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[AMDGPU] Scavenge a VGPR to eliminate a frame index #166979

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Merged
gandhi56 merged 1 commit into from
Dec 9, 2025
+498 −3
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[AMDGPU] Scavenge a VGPR to eliminate a frame index #166979

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32 changes: 29 additions & 3 deletions llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2983,10 +2983,36 @@ bool SIRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator MI,
: RS->scavengeRegisterBackwards(AMDGPU::SReg_32_XM0RegClass,
MI, false, 0, !UseSGPR);

// TODO: for flat scratch another attempt can be made with a VGPR index
// if no SGPRs can be scavenged.
if ((!TmpSReg && !FrameReg) || (!TmpReg && !UseSGPR))
if ((!TmpSReg && !FrameReg) || (!TmpReg && !UseSGPR)) {
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@arsenm arsenm Jan 30, 2026

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Can you add a MIR test for this, there are many samples stressing spill pseudo situations

int SVOpcode = AMDGPU::getFlatScratchInstSVfromSS(MI->getOpcode());
if (ST.hasFlatScratchSVSMode() && SVOpcode != -1) {
Register TmpVGPR = RS->scavengeRegisterBackwards(
AMDGPU::VGPR_32RegClass, MI, false, 0, /*AllowSpill=*/true);

// Materialize the frame register.
auto MIB =
BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_MOV_B32_e32), TmpVGPR);
if (FrameReg)
MIB.addReg(FrameReg);
else
MIB.addImm(Offset);

// Add the offset to the frame register.
if (FrameReg && Offset)
BuildMI(*MBB, MI, DL, TII->get(AMDGPU::V_ADD_U32_e32), FrameReg)
.addReg(FrameReg, RegState::Kill)
.addImm(Offset);
Comment on lines +3001 to +3004
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@arsenm arsenm Jan 30, 2026

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How is this valid? Frame reg is an SGPR, and this is writing to it with a VALU instruction. Offset is also an immediate, and cannot be used in src1 of V_ADD_U32_e32.


BuildMI(*MBB, MI, DL, TII->get(SVOpcode))
.add(MI->getOperand(0)) // $vdata
.addReg(TmpVGPR) // $vaddr
.addImm(0) // Offset
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@arsenm arsenm Jan 30, 2026

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This should try to split the constant offset component into the addressing mode, and separately add as required above

.add(*TII->getNamedOperand(*MI, AMDGPU::OpName::cpol));
MI->eraseFromParent();
return true;
}
report_fatal_error("Cannot scavenge register in FI elimination!");
}

if (!TmpSReg) {
// Use frame register and restore it after.
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