[WebAssembly] Implement GlobalISel

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

@@ -10,6 +10,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "llvm/CodeGen/GlobalISel/IRTranslator.h"
+#include "llvm/ADT/APInt.h"
 #include "llvm/ADT/PostOrderIterator.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/ScopeExit.h"
@@ -64,6 +65,7 @@
 #include "llvm/IR/IntrinsicsAMDGPU.h"
 #include "llvm/IR/LLVMContext.h"
 #include "llvm/IR/Metadata.h"
+#include "llvm/IR/Operator.h"
 #include "llvm/IR/PatternMatch.h"
 #include "llvm/IR/Statepoint.h"
 #include "llvm/IR/Type.h"
@@ -1600,8 +1602,16 @@ bool IRTranslator::translateGetElementPtr(const User &U,
   uint32_t PtrAddFlags = 0;
   // Each PtrAdd generated to implement the GEP inherits its nuw, nusw, inbounds
   // flags.
-  if (const Instruction *I = dyn_cast<Instruction>(&U))
-    PtrAddFlags = MachineInstr::copyFlagsFromInstruction(*I);
+  if (const GEPOperator *GEP = dyn_cast<GEPOperator>(&U)) {
+    if (GEP->hasNoUnsignedSignedWrap())
+      PtrAddFlags |= MachineInstr::MIFlag::NoUSWrap;
+
+    if (GEP->hasNoUnsignedWrap())
+      PtrAddFlags |= MachineInstr::MIFlag::NoUWrap;
+
+    if (GEP->isInBounds())
+      PtrAddFlags |= MachineInstr::MIFlag::InBounds;
+  }
 
   auto PtrAddFlagsWithConst = [&](int64_t Offset) {
     // For nusw/inbounds GEP with an offset that is nonnegative when interpreted
@@ -1706,6 +1716,7 @@ bool IRTranslator::translateGetElementPtr(const User &U,
   }
 
   if (Offset != 0) {
+    Offset = APInt(OffsetTy.getSizeInBits(), Offset, true, true).getSExtValue();
     auto OffsetMIB =
         MIRBuilder.buildConstant(OffsetTy, Offset);
 

llvm/lib/Target/WebAssembly/CMakeLists.txt

@@ -9,13 +9,30 @@ tablegen(LLVM WebAssemblyGenDisassemblerTables.inc -gen-disassembler)
 tablegen(LLVM WebAssemblyGenFastISel.inc -gen-fast-isel)
 tablegen(LLVM WebAssemblyGenInstrInfo.inc -gen-instr-info)
 tablegen(LLVM WebAssemblyGenMCCodeEmitter.inc -gen-emitter)
+tablegen(LLVM WebAssemblyGenRegisterBank.inc -gen-register-bank)
 tablegen(LLVM WebAssemblyGenRegisterInfo.inc -gen-register-info)
 tablegen(LLVM WebAssemblyGenSDNodeInfo.inc -gen-sd-node-info)
 tablegen(LLVM WebAssemblyGenSubtargetInfo.inc -gen-subtarget)
 
+set(LLVM_TARGET_DEFINITIONS WebAssemblyGISel.td)
+tablegen(LLVM WebAssemblyGenGlobalISel.inc -gen-global-isel)
+tablegen(LLVM WebAssemblyGenO0PreLegalizeGICombiner.inc -gen-global-isel-combiner
+              -combiners="WebAssemblyO0PreLegalizerCombiner")
+tablegen(LLVM WebAssemblyGenPreLegalizeGICombiner.inc -gen-global-isel-combiner
+              -combiners="WebAssemblyPreLegalizerCombiner")
+tablegen(LLVM WebAssemblyGenPostLegalizeGICombiner.inc -gen-global-isel-combiner
+              -combiners="WebAssemblyPostLegalizerCombiner")
+
 add_public_tablegen_target(WebAssemblyCommonTableGen)
 
 add_llvm_target(WebAssemblyCodeGen
+  GISel/WebAssemblyCallLowering.cpp
+  GISel/WebAssemblyInstructionSelector.cpp
+  GISel/WebAssemblyO0PreLegalizerCombiner.cpp
+  GISel/WebAssemblyPostLegalizerCombiner.cpp
+  GISel/WebAssemblyPreLegalizerCombiner.cpp
+  GISel/WebAssemblyLegalizerInfo.cpp
+  GISel/WebAssemblyRegisterBankInfo.cpp
   WebAssemblyAddMissingPrototypes.cpp
   WebAssemblyArgumentMove.cpp
   WebAssemblyAsmPrinter.cpp
@@ -72,6 +89,7 @@ add_llvm_target(WebAssemblyCodeGen
   CodeGen
   CodeGenTypes
   Core
+  GlobalISel
   MC
   Scalar
   SelectionDAG