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[llvm-objcopy][libObject] Add RISC-V big-endian support #146913

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Merged
merged 7 commits into from
Jul 17, 2025
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[llvm-objcopy][libObject] Add RISC-V big-endian support #146913

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a3b50d1
[llvm-objcopy][libObject] Add RISC-V big-endian support
djtodoro Jul 3, 2025
9f95a0c
Fixup: Remove Triple::riscv32/64be from isLittleEndian predicates
djtodoro Jul 4, 2025
5db9463
Apply clang-format
djtodoro Jul 4, 2025
688f560
Satisfy clang-format
djtodoro Jul 4, 2025
2f68ae4
Additional request from clang-format
djtodoro Jul 4, 2025
158b232
Follow existing format
djtodoro Jul 9, 2025
f988ae8
Revert "Follow existing format"
djtodoro Jul 15, 2025
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2 changes: 1 addition & 1 deletion clang/test/Driver/frame-pointer-elim.c
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Expand Up @@ -160,7 +160,7 @@
// RUN: FileCheck --check-prefix=KEEP-ALL %s
// RUN: %clang -### --target=riscv64-linux-android -O1 -S %s 2>&1 | \
// RUN: FileCheck --check-prefix=KEEP-NON-LEAF %s
// RUN: not %clang -### --target=riscv64-linux-android -mbig-endian -O1 -S %s 2>&1 | \
// RUN: %clang -### --target=riscv64-linux-android -mbig-endian -O1 -S %s 2>&1 | \
// RUN: FileCheck --check-prefix=KEEP-NON-LEAF %s

// On ARM backend bare metal targets, frame pointer is omitted
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8 changes: 4 additions & 4 deletions llvm/include/llvm/Object/ELFObjectFile.h
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Expand Up @@ -1312,7 +1312,7 @@ StringRef ELFObjectFile<ELFT>::getFileFormatName() const {
case ELF::EM_PPC:
return (IsLittleEndian ? "elf32-powerpcle" : "elf32-powerpc");
case ELF::EM_RISCV:
return "elf32-littleriscv";
return (IsLittleEndian ? "elf32-littleriscv" : "elf32-bigriscv");
case ELF::EM_CSKY:
return "elf32-csky";
case ELF::EM_SPARC:
Expand All @@ -1338,7 +1338,7 @@ StringRef ELFObjectFile<ELFT>::getFileFormatName() const {
case ELF::EM_PPC64:
return (IsLittleEndian ? "elf64-powerpcle" : "elf64-powerpc");
case ELF::EM_RISCV:
return "elf64-littleriscv";
return (IsLittleEndian ? "elf64-littleriscv" : "elf64-bigriscv");
case ELF::EM_S390:
return "elf64-s390";
case ELF::EM_SPARCV9:
Expand Down Expand Up @@ -1400,9 +1400,9 @@ template <class ELFT> Triple::ArchType ELFObjectFile<ELFT>::getArch() const {
case ELF::EM_RISCV:
switch (EF.getHeader().e_ident[ELF::EI_CLASS]) {
case ELF::ELFCLASS32:
return Triple::riscv32;
return IsLittleEndian ? Triple::riscv32 : Triple::riscv32be;
case ELF::ELFCLASS64:
return Triple::riscv64;
return IsLittleEndian ? Triple::riscv64 : Triple::riscv64be;
default:
report_fatal_error("Invalid ELFCLASS!");
}
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14 changes: 10 additions & 4 deletions llvm/include/llvm/TargetParser/Triple.h
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Expand Up @@ -74,8 +74,10 @@ class Triple {
ppc64le, // PPC64LE: powerpc64le
r600, // R600: AMD GPUs HD2XXX - HD6XXX
amdgcn, // AMDGCN: AMD GCN GPUs
riscv32, // RISC-V (32-bit): riscv32
riscv64, // RISC-V (64-bit): riscv64
riscv32, // RISC-V (32-bit, little endian): riscv32
riscv64, // RISC-V (64-bit, little endian): riscv64
riscv32be, // RISC-V (32-bit, big endian): riscv32be
riscv64be, // RISC-V (64-bit, big endian): riscv64be
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@jh7370 jh7370 Jul 4, 2025

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I'd love to know why clang-format disagrees with this formatting...

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@djtodoro djtodoro Jul 4, 2025

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Strange...

sparc, // Sparc: sparc
sparcv9, // Sparcv9: Sparcv9
sparcel, // Sparc: (endianness = little). NB: 'Sparcle' is a CPU variant
Expand Down Expand Up @@ -1069,10 +1071,14 @@ class Triple {
}

/// Tests whether the target is 32-bit RISC-V.
bool isRISCV32() const { return getArch() == Triple::riscv32; }
bool isRISCV32() const {
return getArch() == Triple::riscv32 || getArch() == Triple::riscv32be;
}

/// Tests whether the target is 64-bit RISC-V.
bool isRISCV64() const { return getArch() == Triple::riscv64; }
bool isRISCV64() const {
return getArch() == Triple::riscv64 || getArch() == Triple::riscv64be;
}

/// Tests whether the target is RISC-V (32- and 64-bit).
bool isRISCV() const { return isRISCV32() || isRISCV64(); }
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6 changes: 5 additions & 1 deletion llvm/lib/Object/RelocationResolver.cpp
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Expand Up @@ -812,6 +812,7 @@ getRelocationResolver(const ObjectFile &Obj) {
case Triple::amdgcn:
return {supportsAmdgpu, resolveAmdgpu};
case Triple::riscv64:
case Triple::riscv64be:
return {supportsRISCV, resolveRISCV};
default:
if (isAMDGPU(Obj))
Expand Down Expand Up @@ -851,6 +852,7 @@ getRelocationResolver(const ObjectFile &Obj) {
case Triple::r600:
return {supportsAmdgpu, resolveAmdgpu};
case Triple::riscv32:
case Triple::riscv32be:
return {supportsRISCV, resolveRISCV};
case Triple::csky:
return {supportsCSKY, resolveCSKY};
Expand Down Expand Up @@ -897,7 +899,9 @@ uint64_t resolveRelocation(RelocationResolver Resolver, const RelocationRef &R,
if (Obj->getArch() != Triple::loongarch32 &&
Obj->getArch() != Triple::loongarch64 &&
Obj->getArch() != Triple::riscv32 &&
Obj->getArch() != Triple::riscv64)
Obj->getArch() != Triple::riscv64 &&
Obj->getArch() != Triple::riscv32be &&
Obj->getArch() != Triple::riscv64be)
LocData = 0;
}
}
Expand Down
41 changes: 38 additions & 3 deletions llvm/lib/TargetParser/Triple.cpp
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Expand Up @@ -63,6 +63,8 @@ StringRef Triple::getArchTypeName(ArchType Kind) {
case renderscript64: return "renderscript64";
case riscv32: return "riscv32";
case riscv64: return "riscv64";
case riscv32be: return "riscv32be";
case riscv64be: return "riscv64be";
case shave: return "shave";
case sparc: return "sparc";
case sparcel: return "sparcel";
Expand Down Expand Up @@ -237,7 +239,10 @@ StringRef Triple::getArchTypePrefix(ArchType Kind) {
case wasm64: return "wasm";

case riscv32:
case riscv64: return "riscv";
case riscv64:
case riscv32be:
case riscv64be:
return "riscv";

case ve: return "ve";
case csky: return "csky";
Expand Down Expand Up @@ -452,6 +457,8 @@ Triple::ArchType Triple::getArchTypeForLLVMName(StringRef Name) {
.Case("amdgcn", amdgcn)
.Case("riscv32", riscv32)
.Case("riscv64", riscv64)
.Case("riscv32be", riscv32be)
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@jh7370 jh7370 Jul 4, 2025

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Here and in the similar case below, we should probably abide by clang-format's formatting.

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@djtodoro djtodoro Jul 4, 2025

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yeah... I agree

.Case("riscv64be", riscv64be)
.Case("hexagon", hexagon)
.Case("sparc", sparc)
.Case("sparcel", sparcel)
Expand Down Expand Up @@ -598,6 +605,8 @@ static Triple::ArchType parseArch(StringRef ArchName) {
.Case("amdgcn", Triple::amdgcn)
.Case("riscv32", Triple::riscv32)
.Case("riscv64", Triple::riscv64)
.Case("riscv32be", Triple::riscv32be)
.Case("riscv64be", Triple::riscv64be)
.Case("hexagon", Triple::hexagon)
.Cases("s390x", "systemz", Triple::systemz)
.Case("sparc", Triple::sparc)
Expand Down Expand Up @@ -967,6 +976,8 @@ static Triple::ObjectFormatType getDefaultFormat(const Triple &T) {
case Triple::renderscript64:
case Triple::riscv32:
case Triple::riscv64:
case Triple::riscv32be:
case Triple::riscv64be:
case Triple::shave:
case Triple::sparc:
case Triple::sparcel:
Expand Down Expand Up @@ -1689,6 +1700,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::r600:
case llvm::Triple::renderscript32:
case llvm::Triple::riscv32:
case llvm::Triple::riscv32be:
case llvm::Triple::shave:
case llvm::Triple::sparc:
case llvm::Triple::sparcel:
Expand Down Expand Up @@ -1719,6 +1731,7 @@ unsigned Triple::getArchPointerBitWidth(llvm::Triple::ArchType Arch) {
case llvm::Triple::ppc64le:
case llvm::Triple::renderscript64:
case llvm::Triple::riscv64:
case llvm::Triple::riscv64be:
case llvm::Triple::sparcv9:
case llvm::Triple::spirv:
case llvm::Triple::spir64:
Expand Down Expand Up @@ -1797,6 +1810,7 @@ Triple Triple::get32BitArchVariant() const {
case Triple::r600:
case Triple::renderscript32:
case Triple::riscv32:
case Triple::riscv32be:
case Triple::shave:
case Triple::sparc:
case Triple::sparcel:
Expand Down Expand Up @@ -1829,6 +1843,9 @@ Triple Triple::get32BitArchVariant() const {
case Triple::ppc64le: T.setArch(Triple::ppcle); break;
case Triple::renderscript64: T.setArch(Triple::renderscript32); break;
case Triple::riscv64: T.setArch(Triple::riscv32); break;
case Triple::riscv64be:
T.setArch(Triple::riscv32be);
break;
case Triple::sparcv9: T.setArch(Triple::sparc); break;
case Triple::spir64: T.setArch(Triple::spir); break;
case Triple::spirv:
Expand Down Expand Up @@ -1879,6 +1896,7 @@ Triple Triple::get64BitArchVariant() const {
case Triple::ppc64le:
case Triple::renderscript64:
case Triple::riscv64:
case Triple::riscv64be:
case Triple::sparcv9:
case Triple::spir64:
case Triple::spirv64:
Expand Down Expand Up @@ -1906,6 +1924,9 @@ Triple Triple::get64BitArchVariant() const {
case Triple::ppcle: T.setArch(Triple::ppc64le); break;
case Triple::renderscript32: T.setArch(Triple::renderscript64); break;
case Triple::riscv32: T.setArch(Triple::riscv64); break;
case Triple::riscv32be:
T.setArch(Triple::riscv64be);
break;
case Triple::sparc: T.setArch(Triple::sparcv9); break;
case Triple::spir: T.setArch(Triple::spir64); break;
case Triple::spirv:
Expand Down Expand Up @@ -1944,8 +1965,8 @@ Triple Triple::getBigEndianArchVariant() const {
case Triple::r600:
case Triple::renderscript32:
case Triple::renderscript64:
case Triple::riscv32:
case Triple::riscv64:
case Triple::riscv32be:
case Triple::riscv64be:
case Triple::shave:
case Triple::spir64:
case Triple::spir:
Expand Down Expand Up @@ -1978,6 +1999,12 @@ Triple Triple::getBigEndianArchVariant() const {
break;
case Triple::ppcle: T.setArch(Triple::ppc); break;
case Triple::ppc64le: T.setArch(Triple::ppc64); break;
case Triple::riscv32:
T.setArch(Triple::riscv32be);
break;
case Triple::riscv64:
T.setArch(Triple::riscv64be);
break;
case Triple::sparcel: T.setArch(Triple::sparc); break;
case Triple::tcele: T.setArch(Triple::tce); break;
default:
Expand Down Expand Up @@ -2015,6 +2042,12 @@ Triple Triple::getLittleEndianArchVariant() const {
break;
case Triple::ppc: T.setArch(Triple::ppcle); break;
case Triple::ppc64: T.setArch(Triple::ppc64le); break;
case Triple::riscv32be:
T.setArch(Triple::riscv32);
break;
case Triple::riscv64be:
T.setArch(Triple::riscv64);
break;
case Triple::sparc: T.setArch(Triple::sparcel); break;
case Triple::tce: T.setArch(Triple::tcele); break;
default:
Expand Down Expand Up @@ -2053,6 +2086,8 @@ bool Triple::isLittleEndian() const {
case Triple::renderscript64:
case Triple::riscv32:
case Triple::riscv64:
case Triple::riscv32be:
case Triple::riscv64be:
case Triple::shave:
case Triple::sparcel:
case Triple::spir64:
Expand Down
6 changes: 6 additions & 0 deletions llvm/test/tools/llvm-objcopy/ELF/binary-output-target.test
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Expand Up @@ -33,6 +33,12 @@
# RUN: llvm-objcopy -I binary -O elf64-littleriscv %t.txt %t.rv64.o
# RUN: llvm-readobj --file-headers %t.rv64.o | FileCheck %s --check-prefixes=CHECK,LE,RISCV64,64

# RUN: llvm-objcopy -I binary -O elf32-bigriscv %t.txt %t.rv32.o
# RUN: llvm-readobj --file-headers %t.rv32.o | FileCheck %s --check-prefixes=CHECK,BE,RISCV32,32

# RUN: llvm-objcopy -I binary -O elf64-bigriscv %t.txt %t.rv64.o
# RUN: llvm-readobj --file-headers %t.rv64.o | FileCheck %s --check-prefixes=CHECK,BE,RISCV64,64

# RUN: llvm-objcopy -I binary -O elf32-sparc %t.txt %t.sparc.o
# RUN: llvm-readobj --file-headers %t.sparc.o | FileCheck %s --check-prefixes=CHECK,BE,SPARC,32

Expand Down
2 changes: 2 additions & 0 deletions llvm/tools/llvm-objcopy/ObjcopyOptions.cpp
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Expand Up @@ -308,6 +308,8 @@ static const StringMap<MachineInfo> TargetMap{
// RISC-V
{"elf32-littleriscv", {ELF::EM_RISCV, false, true}},
{"elf64-littleriscv", {ELF::EM_RISCV, true, true}},
{"elf32-bigriscv", {ELF::EM_RISCV, false, false}},
{"elf64-bigriscv", {ELF::EM_RISCV, true, false}},
// PowerPC
{"elf32-powerpc", {ELF::EM_PPC, false, false}},
{"elf32-powerpcle", {ELF::EM_PPC, false, true}},
Expand Down
8 changes: 4 additions & 4 deletions llvm/unittests/Object/ELFObjectFileTest.cpp
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Expand Up @@ -177,10 +177,10 @@ TEST(ELFObjectFileTest, MachineTestForPPC) {
}

TEST(ELFObjectFileTest, MachineTestForRISCV) {
std::array<StringRef, 4> Formats = {"elf32-littleriscv", "elf32-littleriscv",
"elf64-littleriscv", "elf64-littleriscv"};
std::array<Triple::ArchType, 4> Archs = {Triple::riscv32, Triple::riscv32,
Triple::riscv64, Triple::riscv64};
std::array<StringRef, 4> Formats = {"elf32-littleriscv", "elf32-bigriscv",
"elf64-littleriscv", "elf64-bigriscv"};
std::array<Triple::ArchType, 4> Archs = {Triple::riscv32, Triple::riscv32be,
Triple::riscv64, Triple::riscv64be};
for (auto [Idx, Data] : enumerate(generateData(ELF::EM_RISCV)))
checkFormatAndArch(Data, Formats[Idx], Archs[Idx]);
}
Expand Down
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