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8 changes: 4 additions & 4 deletions llvm/include/llvm/CodeGen/MachineScheduler.h
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@
// scheduled. Targets can override the DAG builder and scheduler without
// replacing the pass as follows:
//
// ScheduleDAGInstrs *<Target>PassConfig::
// ScheduleDAGInstrs *<Target>TargetMachine::
// createMachineScheduler(MachineSchedContext *C) {
// return new CustomMachineScheduler(C);
// }
Expand All @@ -29,7 +29,7 @@
// plugin an alternate MachineSchedStrategy. The strategy is responsible for
// selecting the highest priority node from the list:
//
// ScheduleDAGInstrs *<Target>PassConfig::
// ScheduleDAGInstrs *<Target>TargetMachine::
// createMachineScheduler(MachineSchedContext *C) {
// return new ScheduleDAGMILive(C, CustomStrategy(C));
// }
Expand All @@ -39,7 +39,7 @@
// can adjust dependencies based on target-specific knowledge or add weak edges
// to aid heuristics:
//
// ScheduleDAGInstrs *<Target>PassConfig::
// ScheduleDAGInstrs *<Target>TargetMachine::
// createMachineScheduler(MachineSchedContext *C) {
// ScheduleDAGMI *DAG = createGenericSchedLive(C);
// DAG->addMutation(new CustomDAGMutation(...));
Expand Down Expand Up @@ -137,7 +137,7 @@ struct MachineSchedContext {
MachineFunction *MF = nullptr;
const MachineLoopInfo *MLI = nullptr;
const MachineDominatorTree *MDT = nullptr;
const TargetPassConfig *PassConfig = nullptr;
const TargetMachine *TM = nullptr;
AAResults *AA = nullptr;
LiveIntervals *LIS = nullptr;

Expand Down
2 changes: 1 addition & 1 deletion llvm/include/llvm/CodeGen/TargetInstrInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -1566,7 +1566,7 @@ class TargetInstrInfo : public MCInstrInfo {
/// DAG->addMutation(createLoadClusterDAGMutation(DAG->TII, DAG->TRI));
/// or
/// DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
/// to TargetPassConfig::createMachineScheduler() to have an effect.
/// to TargetMachine::createMachineScheduler() to have an effect.
///
/// \p BaseOps1 and \p BaseOps2 are memory operands of two memory operations.
/// \p Offset1 and \p Offset2 are the byte offsets for the memory
Expand Down
23 changes: 0 additions & 23 deletions llvm/include/llvm/CodeGen/TargetPassConfig.h
Original file line number Diff line number Diff line change
Expand Up @@ -22,9 +22,7 @@
namespace llvm {

class TargetMachine;
struct MachineSchedContext;
class PassConfigImpl;
class ScheduleDAGInstrs;
class CSEConfigBase;
class PassInstrumentationCallbacks;

Expand Down Expand Up @@ -300,27 +298,6 @@ class TargetPassConfig : public ImmutablePass {
/// Fully developed targets will not generally override this.
virtual void addMachinePasses();

/// Create an instance of ScheduleDAGInstrs to be run within the standard
/// MachineScheduler pass for this function and target at the current
/// optimization level.
///
/// This can also be used to plug a new MachineSchedStrategy into an instance
/// of the standard ScheduleDAGMI:
/// return new ScheduleDAGMI(C, std::make_unique<MyStrategy>(C), /*RemoveKillFlags=*/false)
///
/// Return NULL to select the default (generic) machine scheduler.
virtual ScheduleDAGInstrs *
createMachineScheduler(MachineSchedContext *C) const {
return nullptr;
}

/// Similar to createMachineScheduler but used when postRA machine scheduling
/// is enabled.
virtual ScheduleDAGInstrs *
createPostMachineScheduler(MachineSchedContext *C) const {
return nullptr;
}

/// printAndVerify - Add a pass to dump then verify the machine function, if
/// those steps are enabled.
void printAndVerify(const std::string &Banner);
Expand Down
24 changes: 24 additions & 0 deletions llvm/include/llvm/Target/TargetMachine.h
Original file line number Diff line number Diff line change
Expand Up @@ -39,6 +39,7 @@ using ModulePassManager = PassManager<Module>;
class Function;
class GlobalValue;
class MachineModuleInfoWrapperPass;
struct MachineSchedContext;
class Mangler;
class MCAsmInfo;
class MCContext;
Expand All @@ -50,6 +51,7 @@ class raw_pwrite_stream;
class PassBuilder;
class PassInstrumentationCallbacks;
struct PerFunctionMIParsingState;
class ScheduleDAGInstrs;
class SMDiagnostic;
class SMRange;
class Target;
Expand Down Expand Up @@ -147,6 +149,28 @@ class TargetMachine {
return nullptr;
}

/// Create an instance of ScheduleDAGInstrs to be run within the standard
/// MachineScheduler pass for this function and target at the current
/// optimization level.
///
/// This can also be used to plug a new MachineSchedStrategy into an instance
/// of the standard ScheduleDAGMI:
/// return new ScheduleDAGMI(C, std::make_unique<MyStrategy>(C),
/// /*RemoveKillFlags=*/false)
///
/// Return NULL to select the default (generic) machine scheduler.
virtual ScheduleDAGInstrs *
createMachineScheduler(MachineSchedContext *C) const {
return nullptr;
}

/// Similar to createMachineScheduler but used when postRA machine scheduling
/// is enabled.
virtual ScheduleDAGInstrs *
createPostMachineScheduler(MachineSchedContext *C) const {
return nullptr;
}

/// Allocate and return a default initialized instance of the YAML
/// representation for the MachineFunctionInfo.
virtual yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const {
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/MachinePipeliner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -511,7 +511,7 @@ bool MachinePipeliner::runWindowScheduler(MachineLoop &L) {
Context.MF = MF;
Context.MLI = MLI;
Context.MDT = MDT;
Context.PassConfig = &getAnalysis<TargetPassConfig>();
Context.TM = &getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
Context.AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
Context.LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
Context.RegClassInfo->runOnMachineFunction(*MF);
Expand Down
12 changes: 8 additions & 4 deletions llvm/lib/CodeGen/MachineScheduler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,7 @@
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/GraphWriter.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetMachine.h"
#include <algorithm>
#include <cassert>
#include <cstdint>
Expand Down Expand Up @@ -392,8 +393,11 @@ ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() {
if (Ctor != useDefaultMachineSched)
return Ctor(this);

const TargetMachine &TM =
getAnalysis<TargetPassConfig>().getTM<TargetMachine>();

// Get the default scheduler set by the target for this function.
ScheduleDAGInstrs *Scheduler = PassConfig->createMachineScheduler(this);
ScheduleDAGInstrs *Scheduler = TM.createMachineScheduler(this);
if (Scheduler)
return Scheduler;

Expand All @@ -405,8 +409,10 @@ ScheduleDAGInstrs *MachineScheduler::createMachineScheduler() {
/// the caller. We don't have a command line option to override the postRA
/// scheduler. The Target must configure it.
ScheduleDAGInstrs *PostMachineScheduler::createPostMachineScheduler() {
const TargetMachine &TM =
getAnalysis<TargetPassConfig>().getTM<TargetMachine>();
// Get the postRA scheduler set by the target for this function.
ScheduleDAGInstrs *Scheduler = PassConfig->createPostMachineScheduler(this);
ScheduleDAGInstrs *Scheduler = TM.createPostMachineScheduler(this);
if (Scheduler)
return Scheduler;

Expand Down Expand Up @@ -446,7 +452,6 @@ bool MachineScheduler::runOnMachineFunction(MachineFunction &mf) {
MF = &mf;
MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
MDT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
PassConfig = &getAnalysis<TargetPassConfig>();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();

LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
Expand Down Expand Up @@ -484,7 +489,6 @@ bool PostMachineScheduler::runOnMachineFunction(MachineFunction &mf) {
// Initialize the context of the pass.
MF = &mf;
MLI = &getAnalysis<MachineLoopInfoWrapperPass>().getLI();
PassConfig = &getAnalysis<TargetPassConfig>();
AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();

if (VerifyScheduling)
Expand Down
3 changes: 2 additions & 1 deletion llvm/lib/CodeGen/WindowScheduler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -45,6 +45,7 @@
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/TimeProfiler.h"
#include "llvm/Target/TargetMachine.h"

using namespace llvm;

Expand Down Expand Up @@ -167,7 +168,7 @@ WindowScheduler::createMachineScheduler(bool OnlyBuildGraph) {
? new ScheduleDAGMI(
Context, std::make_unique<PostGenericScheduler>(Context),
true)
: Context->PassConfig->createMachineScheduler(Context);
: Context->TM->createMachineScheduler(Context);
}

bool WindowScheduler::initialize() {
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AArch64/AArch64MacroFusion.h
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ namespace llvm {

/// Note that you have to add:
/// DAG.addMutation(createAArch64MacroFusionDAGMutation());
/// to AArch64PassConfig::createMachineScheduler() to have an effect.
/// to AArch64TargetMachine::createMachineScheduler() to have an effect.
std::unique_ptr<ScheduleDAGMutation> createAArch64MacroFusionDAGMutation();

} // llvm
Expand Down
54 changes: 27 additions & 27 deletions llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -480,6 +480,33 @@ AArch64TargetMachine::getSubtargetImpl(const Function &F) const {
return I.get();
}

ScheduleDAGInstrs *
AArch64TargetMachine::createMachineScheduler(MachineSchedContext *C) const {
const AArch64Subtarget &ST = C->MF->getSubtarget<AArch64Subtarget>();
ScheduleDAGMILive *DAG = createGenericSchedLive(C);
DAG->addMutation(createLoadClusterDAGMutation(DAG->TII, DAG->TRI));
DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
if (ST.hasFusion())
DAG->addMutation(createAArch64MacroFusionDAGMutation());
return DAG;
}

ScheduleDAGInstrs *
AArch64TargetMachine::createPostMachineScheduler(MachineSchedContext *C) const {
const AArch64Subtarget &ST = C->MF->getSubtarget<AArch64Subtarget>();
ScheduleDAGMI *DAG =
new ScheduleDAGMI(C, std::make_unique<AArch64PostRASchedStrategy>(C),
/* RemoveKillFlags=*/true);
if (ST.hasFusion()) {
// Run the Macro Fusion after RA again since literals are expanded from
// pseudos then (v. addPreSched2()).
DAG->addMutation(createAArch64MacroFusionDAGMutation());
return DAG;
}

return DAG;
}

void AArch64leTargetMachine::anchor() { }

AArch64leTargetMachine::AArch64leTargetMachine(
Expand Down Expand Up @@ -512,33 +539,6 @@ class AArch64PassConfig : public TargetPassConfig {
return getTM<AArch64TargetMachine>();
}

ScheduleDAGInstrs *
createMachineScheduler(MachineSchedContext *C) const override {
const AArch64Subtarget &ST = C->MF->getSubtarget<AArch64Subtarget>();
ScheduleDAGMILive *DAG = createGenericSchedLive(C);
DAG->addMutation(createLoadClusterDAGMutation(DAG->TII, DAG->TRI));
DAG->addMutation(createStoreClusterDAGMutation(DAG->TII, DAG->TRI));
if (ST.hasFusion())
DAG->addMutation(createAArch64MacroFusionDAGMutation());
return DAG;
}

ScheduleDAGInstrs *
createPostMachineScheduler(MachineSchedContext *C) const override {
const AArch64Subtarget &ST = C->MF->getSubtarget<AArch64Subtarget>();
ScheduleDAGMI *DAG =
new ScheduleDAGMI(C, std::make_unique<AArch64PostRASchedStrategy>(C),
/* RemoveKillFlags=*/true);
if (ST.hasFusion()) {
// Run the Macro Fusion after RA again since literals are expanded from
// pseudos then (v. addPreSched2()).
DAG->addMutation(createAArch64MacroFusionDAGMutation());
return DAG;
}

return DAG;
}

void addIRPasses() override;
bool addPreISel() override;
void addCodeGenPrepare() override;
Expand Down
5 changes: 5 additions & 0 deletions llvm/lib/Target/AArch64/AArch64TargetMachine.h
Original file line number Diff line number Diff line change
Expand Up @@ -70,6 +70,11 @@ class AArch64TargetMachine : public CodeGenTargetMachineImpl {
bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override {
return getPointerSize(SrcAS) == getPointerSize(DestAS);
}
ScheduleDAGInstrs *
createMachineScheduler(MachineSchedContext *C) const override;

ScheduleDAGInstrs *
createPostMachineScheduler(MachineSchedContext *C) const override;

private:
bool isLittle;
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ namespace llvm {

/// Note that you have to add:
/// DAG.addMutation(createAMDGPUMacroFusionDAGMutation());
/// to AMDGPUPassConfig::createMachineScheduler() to have an effect.
/// to AMDGPUTargetMachine::createMachineScheduler() to have an effect.
std::unique_ptr<ScheduleDAGMutation> createAMDGPUMacroFusionDAGMutation();

} // llvm
Expand Down
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