Address comments

- Restrict the option to AIX
- In IR use module flag instead of function attribute
- Added more cases
- Simplify change to AsmPrinter
- Added cases for byref

clang/include/clang/Driver/Options.td

@@ -5041,8 +5041,9 @@ def mno_spe : Flag<["-"], "mno-spe">, Group<m_ppc_Features_Group>;
 def mefpu2 : Flag<["-"], "mefpu2">, Group<m_ppc_Features_Group>;
 } // let Flags = [TargetSpecific]
 def msave_reg_params : Flag<["-"], "msave-reg-params">, Group<m_Group>,
+  Flags<[TargetSpecific]>,
   Visibility<[ClangOption, CC1Option]>,
-  HelpText<"Save arguments passed by registers to stack">,
+  HelpText<"Save arguments passed by registers to ABI-defined stack positions">,
   MarshallingInfoFlag<CodeGenOpts<"SaveRegParams">>;
 def mabi_EQ_quadword_atomics : Flag<["-"], "mabi=quadword-atomics">,
   Group<m_Group>, Visibility<[ClangOption, CC1Option]>,

clang/lib/CodeGen/CGCall.cpp

@@ -1931,9 +1931,6 @@ static void getTrivialDefaultFunctionAttributes(
     if (CodeGenOpts.NullPointerIsValid)
       FuncAttrs.addAttribute(llvm::Attribute::NullPointerIsValid);
 
-    if (CodeGenOpts.SaveRegParams)
-      FuncAttrs.addAttribute("save-reg-params");
-
     if (LangOpts.getDefaultExceptionMode() == LangOptions::FPE_Ignore)
       FuncAttrs.addAttribute("no-trapping-math", "true");
 

clang/lib/CodeGen/Targets/PPC.cpp

@@ -146,6 +146,10 @@ class AIXTargetCodeGenInfo : public TargetCodeGenInfo {
 
   void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
                            CodeGen::CodeGenModule &M) const override;
+
+  void emitTargetMetadata(CodeGen::CodeGenModule &CGM,
+                          const llvm::MapVector<GlobalDecl, StringRef>
+                              &MangledDeclNames) const override;
 };
 } // namespace
 
@@ -321,6 +325,13 @@ void AIXTargetCodeGenInfo::setTargetAttributes(
   }
 }
 
+void AIXTargetCodeGenInfo::emitTargetMetadata(
+    CodeGen::CodeGenModule &CGM,
+    const llvm::MapVector<GlobalDecl, StringRef> &MangledDeclNames) const {
+  if (CGM.getCodeGenOpts().SaveRegParams)
+    CGM.getModule().addModuleFlag(llvm::Module::Error, "save-reg-params", 1);
+}
+
 // PowerPC-32
 namespace {
 /// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.

clang/test/CodeGen/PowerPC/save-reg-params.c

@@ -1,12 +1,10 @@
-// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s -msave-reg-params | FileCheck -check-prefix=SAVE %s
 // RUN: %clang_cc1 -triple powerpc64-ibm-aix -emit-llvm -o - %s -msave-reg-params | FileCheck -check-prefix=SAVE %s
 // RUN: %clang_cc1 -triple powerpc-ibm-aix -emit-llvm -o - %s -msave-reg-params | FileCheck -check-prefix=SAVE %s
-// RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm -o - %s | FileCheck -check-prefix=NOSAVE %s
 // RUN: %clang_cc1 -triple powerpc64-ibm-aix -emit-llvm -o - %s | FileCheck -check-prefix=NOSAVE %s
 // RUN: %clang_cc1 -triple powerpc-ibm-aix -emit-llvm -o - %s | FileCheck -check-prefix=NOSAVE %s
 
 void bar(int);
 void foo(int x) { bar(x); }
 
-// SAVE: attributes #{{[0-9]+}} = { {{.+}} "save-reg-params" {{.+}} }
-// NOSAVE-NOT: "save-reg-params"···
+// SAVE: !{i32 1, !"save-reg-params", i32 1}
+// NOSAVE-NOT: !{i32 1, !"save-reg-params", i32 1}

llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

@@ -2496,7 +2496,12 @@ void PPCAIXAsmPrinter::emitTracebackTable() {
 
   uint32_t GPRSaved = 0;
 
-  if (FI->getForceGPRSaveCount() < 0) {
+  bool SaveParams =
+      MF->getFunction().getParent()->getModuleFlag("save-reg-params");
+  if (SaveParams) {
+    // Assuming eight GPRs matches XL behavior for varargs.
+    GPRSaved = 8;
+  } else {
     // X13 is reserved under 64-bit environment.
     unsigned GPRBegin = Subtarget->isPPC64() ? PPC::X14 : PPC::R13;
     unsigned GPREnd = Subtarget->isPPC64() ? PPC::X31 : PPC::R31;
@@ -2507,8 +2512,6 @@ void PPCAIXAsmPrinter::emitTracebackTable() {
         break;
       }
     }
-  } else {
-    GPRSaved = FI->getForceGPRSaveCount();
   }
 
   SecondHalfOfMandatoryField |= (GPRSaved << TracebackTable::GPRSavedShift) &

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

@@ -7225,7 +7225,8 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
   const unsigned LinkageSize = Subtarget.getFrameLowering()->getLinkageSize();
   CCInfo.AllocateStack(LinkageSize, Align(PtrByteSize));
   uint64_t SaveStackPos = CCInfo.getStackSize();
-  bool SaveParams = MF.getFunction().hasFnAttribute("save-reg-params");
+  bool SaveParams =
+      MF.getFunction().getParent()->getModuleFlag("save-reg-params");
   CCInfo.AnalyzeFormalArguments(Ins, CC_AIX);
 
   SmallVector<SDValue, 8> MemOps;
@@ -7247,10 +7248,10 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
     if (SaveParams && VA.isRegLoc() && !Flags.isByVal()) {
       const TargetRegisterClass *RegClass = getRegClassForSVT(
           LocVT.SimpleTy, IsPPC64, Subtarget.hasP8Vector(), Subtarget.hasVSX());
-      // On PPC64, we need to use std instead of stw for GPR.
+      // On PPC64, debugger assumes extended 8-byte value are stored from GPR.
       MVT SaveVT = RegClass == &PPC::G8RCRegClass ? MVT::i64 : LocVT;
       const Register VReg = MF.addLiveIn(VA.getLocReg(), RegClass);
-      SDValue Parm = DAG.getRegister(VReg, SaveVT);
+      SDValue Parm = DAG.getCopyFromReg(Chain, dl, VReg, SaveVT);
       int FI = MFI.CreateFixedObject(SaveVT.getStoreSize(), SaveStackPos, true);
       SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
       SDValue StoreReg = DAG.getStore(Chain, dl, Parm, FIN,
@@ -7478,11 +7479,6 @@ SDValue PPCTargetLowering::LowerFormalArguments_AIX(
   FuncInfo->setMinReservedArea(CallerReservedArea);
 
   if (isVarArg) {
-    // Maximum number of saved GPR in traceback table is 8, for varargs,
-    // assuming eight GPRs matches XL behavior.
-    if (SaveParams)
-      FuncInfo->setForceGPRSaveCount(8);
-
     FuncInfo->setVarArgsFrameIndex(
         MFI.CreateFixedObject(PtrByteSize, CCInfo.getStackSize(), true));
     SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);

llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h

@@ -150,9 +150,6 @@ class PPCFunctionInfo : public MachineFunctionInfo {
   /// to use SExt/ZExt flags in later optimization.
   std::vector<std::pair<Register, ISD::ArgFlagsTy>> LiveInAttrs;
 
-  /// Set a fixed number of saved GPRs, negative if it's non-fixed.
-  int ForceGPRSaveCount = -1;
-
   /// Flags for aix-shared-lib-tls-model-opt, will be lazily initialized for
   /// each function.
   bool AIXFuncUseTLSIEForLD = false;
@@ -166,9 +163,6 @@ class PPCFunctionInfo : public MachineFunctionInfo {
         const DenseMap<MachineBasicBlock *, MachineBasicBlock *> &Src2DstMBB)
       const override;
 
-  int getForceGPRSaveCount() const { return ForceGPRSaveCount; }
-  void setForceGPRSaveCount(int Num) { ForceGPRSaveCount = Num; }
-
   int getFramePointerSaveIndex() const { return FramePointerSaveIndex; }
   void setFramePointerSaveIndex(int Idx) { FramePointerSaveIndex = Idx; }