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[WebAssembly] Add auto-upgrade for renamed intrinsics
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D138249 renamed a number of wasm intrinsics without implementing
auto-upgrade support.

Differential Revision: https://reviews.llvm.org/D146424
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nikic committed Mar 21, 2023
1 parent 3e79dfa commit 6fc670e
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35 changes: 35 additions & 0 deletions llvm/lib/IR/AutoUpgrade.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/IntrinsicsAArch64.h"
#include "llvm/IR/IntrinsicsARM.h"
#include "llvm/IR/IntrinsicsWebAssembly.h"
#include "llvm/IR/IntrinsicsX86.h"
#include "llvm/IR/LLVMContext.h"
#include "llvm/IR/Metadata.h"
Expand Down Expand Up @@ -1143,6 +1144,40 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
break;
}

case 'w':
if (Name.startswith("wasm.fma.")) {
rename(F);
NewFn = Intrinsic::getDeclaration(
F->getParent(), Intrinsic::wasm_relaxed_madd, F->getReturnType());
return true;
}
if (Name.startswith("wasm.fms.")) {
rename(F);
NewFn = Intrinsic::getDeclaration(
F->getParent(), Intrinsic::wasm_relaxed_nmadd, F->getReturnType());
return true;
}
if (Name.startswith("wasm.laneselect.")) {
rename(F);
NewFn = Intrinsic::getDeclaration(
F->getParent(), Intrinsic::wasm_relaxed_laneselect,
F->getReturnType());
return true;
}
if (Name == "wasm.dot.i8x16.i7x16.signed") {
rename(F);
NewFn = Intrinsic::getDeclaration(
F->getParent(), Intrinsic::wasm_relaxed_dot_i8x16_i7x16_signed);
return true;
}
if (Name == "wasm.dot.i8x16.i7x16.add.signed") {
rename(F);
NewFn = Intrinsic::getDeclaration(
F->getParent(), Intrinsic::wasm_relaxed_dot_i8x16_i7x16_add_signed);
return true;
}
break;

case 'x':
if (UpgradeX86IntrinsicFunction(F, Name, NewFn))
return true;
Expand Down
53 changes: 53 additions & 0 deletions llvm/test/Assembler/autoupgrade-wasm-intrinsics.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,53 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S < %s | FileCheck %s

define <16 x i8> @test_laneselect(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c) {
; CHECK-LABEL: @test_laneselect(
; CHECK-NEXT: [[RES:%.*]] = call <16 x i8> @llvm.wasm.relaxed.laneselect.v16i8(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <16 x i8> [[C:%.*]])
; CHECK-NEXT: ret <16 x i8> [[RES]]
;
%res = call <16 x i8> @llvm.wasm.laneselect.v16i8(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c)
ret <16 x i8> %res
}

define <8 x i16> @test_dot(<16 x i8> %a, <16 x i8> %b) {
; CHECK-LABEL: @test_dot(
; CHECK-NEXT: [[RES:%.*]] = call <8 x i16> @llvm.wasm.relaxed.dot.i8x16.i7x16.signed(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]])
; CHECK-NEXT: ret <8 x i16> [[RES]]
;
%res = call <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed(<16 x i8> %a, <16 x i8> %b)
ret <8 x i16> %res
}

define <4 x i32> @test_dot_add(<16 x i8> %a, <16 x i8> %b, <4 x i32> %c) {
; CHECK-LABEL: @test_dot_add(
; CHECK-NEXT: [[RES:%.*]] = call <4 x i32> @llvm.wasm.relaxed.dot.i8x16.i7x16.add.signed(<16 x i8> [[A:%.*]], <16 x i8> [[B:%.*]], <4 x i32> [[C:%.*]])
; CHECK-NEXT: ret <4 x i32> [[RES]]
;
%res = call <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed(<16 x i8> %a, <16 x i8> %b, <4 x i32> %c)
ret <4 x i32> %res
}

define <4 x float> @test_fma(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
; CHECK-LABEL: @test_fma(
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.wasm.relaxed.madd.v4f32(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
; CHECK-NEXT: ret <4 x float> [[RES]]
;
%res = call <4 x float> @llvm.wasm.fma.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c)
ret <4 x float> %res
}

define <4 x float> @test_fms(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
; CHECK-LABEL: @test_fms(
; CHECK-NEXT: [[RES:%.*]] = call <4 x float> @llvm.wasm.relaxed.nmadd.v4f32(<4 x float> [[A:%.*]], <4 x float> [[B:%.*]], <4 x float> [[C:%.*]])
; CHECK-NEXT: ret <4 x float> [[RES]]
;
%res = call <4 x float> @llvm.wasm.fms.v4f32(<4 x float> %a, <4 x float> %b, <4 x float> %c)
ret <4 x float> %res
}

declare <16 x i8> @llvm.wasm.laneselect.v16i8(<16 x i8>, <16 x i8>, <16 x i8>)
declare <8 x i16> @llvm.wasm.dot.i8x16.i7x16.signed(<16 x i8>, <16 x i8>)
declare <4 x i32> @llvm.wasm.dot.i8x16.i7x16.add.signed(<16 x i8>, <16 x i8>, <4 x i32>)
declare <4 x float> @llvm.wasm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>)
declare <4 x float> @llvm.wasm.fms.v4f32(<4 x float>, <4 x float>, <4 x float>)

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