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[CIR] Add support for DumpRecordLayouts #1667

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Merged
merged 4 commits into from
Jun 9, 2025
Merged

[CIR] Add support for DumpRecordLayouts #1667

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f2ad21c
Add support for DumpRecordLayouts
Andres-Salamanca Jun 6, 2025
456fd5d
Add dump method
Andres-Salamanca Jun 7, 2025
f59a61c
add tests
Andres-Salamanca Jun 8, 2025
d994965
Add triple
Andres-Salamanca Jun 8, 2025
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1 change: 1 addition & 0 deletions clang/lib/CIR/CodeGen/CIRGenRecordLayout.h
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Original file line number Diff line number Diff line change
Expand Up @@ -201,6 +201,7 @@ class CIRGenRecordLayout {
assert(it != BitFields.end() && "Unable to find bitfield info");
return it->second;
}
void print(raw_ostream &os) const;
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@andykaylor andykaylor Jun 6, 2025

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It's very handy to have an additional method, dump() which prints to llvm::errs() and is marked with LLVM_DUMP_METHOD. This lets you print the object from a debugger.

};

} // namespace clang::CIRGen
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40 changes: 39 additions & 1 deletion clang/lib/CIR/CodeGen/CIRRecordLayoutBuilder.cpp
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Expand Up @@ -760,13 +760,51 @@ CIRGenTypes::computeRecordLayout(const RecordDecl *D, cir::RecordType *Ty) {

// Dump the layout, if requested.
if (getContext().getLangOpts().DumpRecordLayouts) {
llvm_unreachable("NYI");
llvm::outs() << "\n*** Dumping CIRgen Record Layout\n";
llvm::outs() << "Record: ";
D->dump(llvm::outs());
llvm::outs() << "\nLayout: ";
RL->print(llvm::outs());
}

// TODO: implement verification
return RL;
}

void CIRGenRecordLayout::print(raw_ostream &os) const {
os << "<CIRecordLayout\n";
os << " CIR Type:" << CompleteObjectType << "\n";
if (BaseSubobjectType)
os << " NonVirtualBaseLLVMType:" << BaseSubobjectType << "\n";
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@andykaylor andykaylor Jun 6, 2025

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Suggested change
os << " NonVirtualBaseLLVMType:" << BaseSubobjectType << "\n";
os << " NonVirtualBaseCIRType:" << BaseSubobjectType << "\n";

os << " IsZeroInitializable:" << IsZeroInitializable << "\n";
os << " BitFields:[\n";
std::vector<std::pair<unsigned, const CIRGenBitFieldInfo *>> bitInfo;
for (auto &[decl, info] : BitFields) {
const RecordDecl *rd = decl->getParent();
unsigned index = 0;
for (RecordDecl::field_iterator it = rd->field_begin(); *it != decl; ++it)
++index;
bitInfo.push_back(std::make_pair(index, &info));
}
llvm::array_pod_sort(bitInfo.begin(), bitInfo.end());
for (auto &info : bitInfo) {
os.indent(4);
info.second->print(os);
os << "\n";
}
os << "]>\n";
}

void CIRGenBitFieldInfo::print(raw_ostream &os) const {
os << "<CIRBitFieldInfo" << " name:" << Name << " offset:" << Offset
<< " size:" << Size << " isSigned:" << IsSigned
<< " storageSize:" << StorageSize
<< " storageOffset:" << StorageOffset.getQuantity()
<< " volatileOffset:" << VolatileOffset
<< " volatileStorageSize:" << VolatileStorageSize
<< " volatileStorageOffset:" << VolatileStorageOffset.getQuantity() << ">";
}

CIRGenBitFieldInfo CIRGenBitFieldInfo::MakeInfo(CIRGenTypes &Types,
const FieldDecl *FD,
uint64_t Offset, uint64_t Size,
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