[platform-stm32f4xx]: Implement sdram support

platform/stm32f4xx/include/platform/sdram.h

@@ -0,0 +1,159 @@
+/*
+ * Copyright (c) 2022 Luka Panio
+ *
+ * Use of this source code is governed by a MIT-style
+ * license that can be found in the LICENSE file or at
+ * https://opensource.org/licenses/MIT
+ */
+/*
+ * COPYRIGHT(c) 2013 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *   1. Redistributions of source code must retain the above copyright notice,
+ *      this list of conditions and the following disclaimer.
+ *   2. Redistributions in binary form must reproduce the above copyright notice,
+ *      this list of conditions and the following disclaimer in the documentation
+ *      and/or other materials provided with the distribution.
+ *   3. Neither the name of STMicroelectronics nor the names of its contributors
+ *      may be used to endorse or promote products derived from this software
+ *      without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+#pragma once
+
+/* Includes ------------------------------------------------------------------*/
+#include <stm32f4xx.h>
+
+/** @addtogroup Utilities
+  * @{
+  */
+
+/** @addtogroup STM32F4_EVAL
+  * @{
+  */ 
+
+/** @addtogroup STM32F429I_DISCOVERY
+  * @{
+  */
+
+/** @addtogroup STM32F429I_DISCOVERY_SDRAM
+  * @{
+  */  
+
+/** @defgroup STM32429I_DISCO_SDRAM_Private_Defines
+  * @{
+  */
+
+/**
+  * @brief  FMC SDRAM Bank address
+  */   
+#define SDRAM_BANK_ADDR     ((uint32_t)0xD0000000)
+
+/**
+  * @brief  FMC SDRAM Memory Width
+  */  
+/* #define SDRAM_MEMORY_WIDTH   FMC_SDMemory_Width_8b  */
+#define SDRAM_MEMORY_WIDTH    FMC_SDMemory_Width_16b 
+
+/**
+  * @brief  FMC SDRAM CAS Latency
+  */  
+/* #define SDRAM_CAS_LATENCY   FMC_CAS_Latency_2  */
+#define SDRAM_CAS_LATENCY    FMC_CAS_Latency_3
+
+/**
+  * @brief  FMC SDRAM Memory clock period
+  */  
+#define SDCLOCK_PERIOD    FMC_SDClock_Period_2        /* Default configuration used with LCD */
+/* #define SDCLOCK_PERIOD    FMC_SDClock_Period_3 */
+
+/**
+  * @brief  FMC SDRAM Memory Read Burst feature
+  */  
+#define SDRAM_READBURST    FMC_Read_Burst_Disable    /* Default configuration used with LCD */
+/* #define SDRAM_READBURST    FMC_Read_Burst_Enable  */
+
+/**
+  * @brief  FMC SDRAM Bank Remap
+  */    
+/* #define SDRAM_BANK_REMAP */   
+
+
+
+/**
+ * @brief Uncomment the line below if you want to use user defined Delay function
+ *        (for precise timing), otherwise default _delay_ function defined within
+ *         this driver is used (less precise timing).  
+ */
+
+/* #define USE_Delay */
+
+#ifdef USE_Delay
+  #define __Delay     Delay      /*  User can provide more timing precise __Delay function
+                                    (with 10ms time base), using SysTick for example */
+#else
+  #define __Delay     delay      /*  Default __Delay function with less precise timing */
+#endif
+
+/**
+  * @brief  FMC SDRAM Mode definition register defines
+  */
+#define SDRAM_MODEREG_BURST_LENGTH_1             ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_LENGTH_2             ((uint16_t)0x0001)
+#define SDRAM_MODEREG_BURST_LENGTH_4             ((uint16_t)0x0002)
+#define SDRAM_MODEREG_BURST_LENGTH_8             ((uint16_t)0x0004)
+#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((uint16_t)0x0000)
+#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((uint16_t)0x0008)
+#define SDRAM_MODEREG_CAS_LATENCY_2              ((uint16_t)0x0020)
+#define SDRAM_MODEREG_CAS_LATENCY_3              ((uint16_t)0x0030)
+#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((uint16_t)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) 
+#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((uint16_t)0x0200)      
+
+/**
+  * @}
+  */  
+
+/** @defgroup STM32429I_DISCO_SDRAM_Exported_Functions
+  * @{
+  */ 
+void  SDRAM_Init(void);
+void  SDRAM_GPIOConfig(void);
+void  SDRAM_InitSequence(void);
+void  SDRAM_WriteBuffer(uint32_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBufferSize);
+void  SDRAM_ReadBuffer(uint32_t* pBuffer, uint32_t uwReadAddress, uint32_t uwBufferSize);
+
+/**
+  * @}
+  */ 
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */   
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

platform/stm32f4xx/init.c

@@ -11,9 +11,12 @@
 #include <platform.h>
 #include <platform/stm32.h>
 #include <arch/arm/cm.h>
+#include <kernel/novm.h>
 #include <stm32f4xx_rcc.h>
 #include "system_stm32f4xx.h"
 
+extern void stm_SDRAM_Init(void);
+
 void platform_early_init(void) {
     // Crank up the clock before initing timers.
     SystemInit();
@@ -25,8 +28,14 @@ void platform_early_init(void) {
 
     stm32_timer_early_init();
     stm32_gpio_early_init();
+
 }
 
 void platform_init(void) {
     stm32_timer_init();
+#if defined(ENABLE_SDRAM)
+    stm_SDRAM_Init();
+    /* add a novm arena for it */
+    novm_add_arena("sdram", SDRAM_BASE, SDRAM_SIZE);
+#endif
 }

platform/stm32f4xx/rules.mk

@@ -30,6 +30,9 @@ ifeq ($(FOUND_CHIP),)
 $(error unknown STM32F4xx chip $(STM32_CHIP))
 endif
 
+GLOBAL_DEFINES += \
+    NOVM_MAX_ARENAS=2
+
 GLOBAL_INCLUDES += \
 	$(LOCAL_DIR)/include/dev
 
@@ -40,7 +43,8 @@ MODULE_SRCS += \
 	$(LOCAL_DIR)/timer.c \
 	$(LOCAL_DIR)/debug.c \
 	$(LOCAL_DIR)/uart.c \
-	$(LOCAL_DIR)/flash.c
+	$(LOCAL_DIR)/flash.c \
+	$(LOCAL_DIR)/sdram.c
 
 # use a two segment memory layout, where all of the read-only sections 
 # of the binary reside in rom, and the read/write are in memory. The