WIP virtio-pci

arch/x86/cache.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2009 Corey Tabaka
+ * Copyright (c) 2024 Travis Geiselbrecht
  *
  * Use of this source code is governed by a MIT-style
  * license that can be found in the LICENSE file or at
@@ -10,3 +11,13 @@
 /* nothing to do to sync I & D cache on x86 */
 void arch_sync_cache_range(addr_t start, size_t len) {
 }
+
+/* for the moment, no cache flushes here either */
+void arch_clean_cache_range(addr_t start, size_t len) {
+}
+
+void arch_clean_invalidate_cache_range(addr_t start, size_t len) {
+}
+
+void arch_invalidate_cache_range(addr_t start, size_t len) {
+}

arch/x86/include/arch/arch_ops.h

@@ -65,4 +65,26 @@ static inline uint arch_curr_cpu_num(void) {
     return 0;
 }
 
+#if ARCH_X86_64
+// relies on SSE2
+#define mb()        __asm__ volatile("mfence" : : : "memory")
+#define rmb()       __asm__ volatile("lfence" : : : "memory")
+#define wmb()       __asm__ volatile("sfence" : : : "memory")
+#else
+#error define for X86-32
+
+
+#endif
+
+#ifdef WITH_SMP
+// XXX probably too strict
+#define smp_mb()    mb
+#define smp_rmb()   rmb
+#define smp_wmb()   wmb
+#else
+#define smp_mb()    CF
+#define smp_wmb()   CF
+#define smp_rmb()   CF
+#endif
+
 #endif // !ASSEMBLY

dev/bus/pci/bus_mgr/bus_mgr.cpp

@@ -323,6 +323,18 @@ status_t pci_bus_mgr_allocate_irq(const pci_location_t loc, uint *irqbase) {
     return d->allocate_irq(irqbase);
 }
 
+ssize_t pci_read_vendor_capability(const pci_location_t loc, size_t index, void *buf, size_t buflen) {
+    char str[14];
+    LTRACEF("%s\n", pci_loc_string(loc, str));
+
+    device *d = lookup_device_by_loc(loc);
+    if (!d) {
+        return ERR_NOT_FOUND;
+    }
+
+    return d->read_vendor_capability(index, buf, buflen);
+}
+
 void pci_dump_bar(const pci_bar_t *bar, int index) {
     if (bar->addr >= UINT32_MAX || bar->size >= UINT32_MAX) {
         printf("BAR %d: addr %-#16llx size %-#16zx io %d 64b %d pref %d\n",

dev/bus/pci/bus_mgr/device.cpp

@@ -133,6 +133,14 @@ void device::dump(size_t indent) {
             pci_dump_bar(bars_ + b, b);
         }
     }
+
+    capability *cap;
+    list_for_every_entry(&capability_list_, cap, capability, node) {
+        for (size_t i = 0; i < indent + 2; i++) {
+            printf(" ");
+        }
+        printf("capability: offset %#x id %#x\n", cap->config_offset, cap->id);
+    }
 }
 
 status_t device::enable() {
@@ -220,6 +228,27 @@ status_t device::probe_capabilities() {
     return NO_ERROR;
 }
 
+ssize_t device::read_vendor_capability(size_t index, void *buf, size_t buflen) {
+    const capability *cap;
+    list_for_every_entry(&capability_list_, cap, capability, node) {
+        if (cap->id == 0x9) { // vendor specific
+            if (index == 0) {
+                uint8_t len;
+                pci_read_config_byte(loc(), cap->config_offset + 2, &len);
+
+                const size_t readlen = MIN(len, buflen);
+                for (size_t i = 0; i < readlen; i++) {
+                    pci_read_config_byte(loc(), cap->config_offset + i, static_cast<uint8_t *>(buf) + i);
+                }
+                return len;
+            }
+            index--;
+        }
+     }
+
+    return ERR_NOT_FOUND;
+}
+
 status_t device::init_msi_capability(capability *cap) {
     LTRACE_ENTRY;
 

dev/bus/pci/bus_mgr/device.h

@@ -90,6 +90,7 @@ class device {
     uint8_t header_type() const { return config_.header_type & PCI_HEADER_TYPE_MASK; }
 
     status_t read_bars(pci_bar_t bar[6]);
+    ssize_t read_vendor_capability(size_t index, void *buf, size_t buflen);
 
     bool has_msi() const { return msi_cap_; }
     bool has_msix() const { return msix_cap_; }

dev/bus/pci/drivers/rules.mk

@@ -1,5 +1,7 @@
 # Fake module that just declares deps on all the PCI drivers in the system.
 #
 MODULES += dev/bus/pci
-
 MODULES += dev/net/e1000
+MODULES += dev/virtio/block
+MODULES += dev/virtio/net
+MODULES += dev/virtio/gpu

dev/bus/pci/include/dev/bus/pci.h

@@ -119,6 +119,9 @@ status_t pci_bus_mgr_allocate_msi(const pci_location_t loc, size_t num_requested
 // allocate a regular irq for this device and return it in irqbase
 status_t pci_bus_mgr_allocate_irq(const pci_location_t loc, uint *irqbase);
 
+// XXX sort this nicely
+ssize_t pci_read_vendor_capability(const pci_location_t loc, size_t index, void *buf, size_t buflen);
+
 // return a pointer to a formatted string
 const char *pci_loc_string(pci_location_t loc, char out_str[14]);
 

dev/virtio/rules.mk

@@ -2,7 +2,7 @@ LOCAL_DIR := $(GET_LOCAL_DIR)
 
 MODULE := $(LOCAL_DIR)
 
-MODULE_SRCS += \
-	$(LOCAL_DIR)/virtio.c
+MODULE_SRCS += $(LOCAL_DIR)/virtio.c
+MODULE_SRCS += $(LOCAL_DIR)/virtio_pci.c
 
 include make/module.mk