[μKernels]: lowering based on m and n tile size

[arun-thmn]

This PR update a small logic in the micro-kernels lowering based on m and n tile size. If:

• m >= n - first load all B matrix elements, then broadcast A one-by-one + do fma.
• n > m - do the opposite. First broadcast all A matrix elements, then load B one-by-one + do fma

The logic is updated for fp32 (both avx512 & avx2) and bf16 (only avx512).
Bf16 avx2 will be done later after fixing the llvm pattern matching problem on ADL machine.

[adam-smnk]

Judging by the tests looks fine.

To be honest, I'm getting lost in all the branches here 😅
Perhaps it could be simplified if you created all the needed ops first then reshuffled them using rewrite.moveOp....
But ultimately as you prefer, as long as you know what's going on. 🙂

[arun-thmn]

Judging by the tests looks fine.

To be honest, I'm getting lost in all the branches here 😅 Perhaps it could be simplified if you created all the needed ops first then reshuffled them using rewrite.moveOp.... But ultimately as you prefer, as long as you know what's going on. 🙂

True, @adam-smnk.
This pass requires lot of conditional branches. There are few TODOs for this pass like i8 support and want to finish then first. Afterwards, definitely will try to simply this one.