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[DSv4 fix proposal — pending upstream support] deepseek4 - #2

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[DSv4 fix proposal — pending upstream support] deepseek4#2
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fix/deepseek4-swa-multislot-views

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PR #2: deepseek4: handle multi-slot SWA cache 4D views

Branch suggestion: fix/deepseek4-swa-multislot-views
Target: ggml-org/llama.cpp master (same caveat as PR #1src/models/deepseek4.cpp doesn't exist upstream yet; open as Draft or target DSv4 fork)
Commit: 43b226148 (14 lines, single file)

Description

Follow-up to DeepSeek V4 Flash support work (nisparks PR ggml-org#22378) and companion to fix/deepseek4-fa-reserve-kv-cast. With -np >= 2, the SWA (sliding window attention) cache produces a 4D view that the legacy reshape-to-3D codepath can't accept. Crash is a 4-vs-3 dimension mismatch the moment the second slot is exercised, after the FA reserve fix in the companion PR.

Patch updates the SWA cache handling in src/models/deepseek4.cpp to retain the 4D view rather than collapse it to 3D when n_seq_max > 1.

Reproduction (before fix)

After applying the F32-cast fix from the companion PR but before this one:

./llama-server \
  -m DeepSeek-V4-Flash-IQ2XXS-...-chat-v2.gguf \
  -ngl all -fa on \
  -c 524288 -np 2 \
  -b 2048 -ub 512 \
  --jinja

Server now passes graph_reserve, but np=2 decode trips a 4D-vs-3D dimension assertion the moment a second concurrent request is scheduled (i.e. only when both slots are active simultaneously and the SWA cache materializes a per-slot view).

After fix

Same command, both slots can be active concurrently. np=2 parallel-load smoke test fires 2 simultaneous requests and both complete correctly. With Phase 5 stream-concurrency batching (separate work) layered on top, this drops the N=2 wall/baseline ratio from 1.948 to 1.283 and lifts aggregate decode throughput from 50.3 to 73.2 tok/s. This PR is the necessary stability prerequisite for that optimization to be possible.

Hardware tested

  • NVIDIA RTX PRO 6000 Blackwell Workstation Edition (sm_120, 96 GB VRAM)
  • CUDA 13.0, driver 595.71.05
  • Build: cmake -DGGML_CUDA=ON -DCMAKE_CUDA_ARCHITECTURES=120 -DGGML_CUDA_FA=ON

Why upstream

Independent of the broader batched-prefill chain in nisparks PR ggml-org#22378. Without this fix, multi-slot DSv4 simply cannot serve concurrent requests on the SWA path. Should apply cleanly to whichever branch eventually upstreams DSv4 support, alongside the F32-cast fix.

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