[Bugfix][Worker] Unblock Qwen3.5-9B align/all perf validation

[lHrHenry233]

What this PR does / why we need it?

This PR addresses two runtime blockers found while validating Qwen3.5 Mamba prefix-caching performance under mamba_cache_mode=align vs all on single-card Ascend (32G HBM).

Background and motivation

During end-to-end perf runs on Qwen/Qwen3.5-9B, the service hit two production-path failures:

1. Spec decode draft proposer hard dependency caused startup/import failure when draft-model module was absent in the runtime package layout.
2. NPU recurrent op dtype mismatch (state as FP32) caused runtime 500 in torch_npu.npu_recurrent_gated_delta_rule, which expects BF16 in this path.

Additionally, there was one constructor compatibility mismatch in this branch:

• NPUInputBatch.__init__() does not accept max_num_blocks_per_req, but caller still passed it.

These issues blocked stable apples-to-apples perf comparison of align/all mode, so this PR focuses on minimal, targeted fixes.

Code changes

1) Make draft proposer import optional (decouple from mandatory MTP draft module)

• File: vllm_ascend/worker/model_runner_v1.py
• Change:
  • Wrap AscendDraftModelProposer import in try/except ModuleNotFoundError.
  • Build draft_proposer_types tuple dynamically in isinstance/assert checks.
• Motivation:
  • Keep speculative path functional without hard crash when draft proposer module is absent.
  • Preserve existing behavior when module is present.

2) Remove stale constructor arg for branch compatibility

• File: vllm_ascend/worker/model_runner_v1.py
• Change:
  • Remove max_num_blocks_per_req=max_num_blocks from NPUInputBatch(...) call.
• Motivation:
  • Current NPUInputBatch.__init__ signature in this branch does not accept that argument.
  • Prevent startup-time TypeError and restore request execution path.

3) Enforce BF16 recurrent state for NPU gated delta rule

• File: vllm_ascend/patch/worker/patch_qwen3_next.py
• Change:
  • Before calling torch_npu.npu_recurrent_gated_delta_rule, cast ssm_state to BF16 when needed in both spec and non-spec decode branches.
• Motivation:
  • Match NPU operator dtype constraints and avoid runtime 500.
  • Keep change localized to callsite with minimal behavior impact.

Does this PR introduce any user-facing change?

• User-visible behavior change is limited to robustness:
  • Service no longer fails in the above runtime scenarios.
  • Enables stable Qwen3.5-9B perf validation flow for align/all cache mode.

How was this patch tested?

Local verification

• Syntax check:
  • python3 -m py_compile vllm_ascend/worker/model_runner_v1.py vllm_ascend/patch/worker/patch_qwen3_next.py

Runtime validation (Ascend NPU)

• Model: Qwen/Qwen3.5-9B
• Server mode: --enable-prefix-caching --enforce-eager
• Compared:
  • --mamba-cache-mode align
  • --mamba-cache-mode all
• Result:
  • Both modes serve /v1/completions successfully after fixes.
  • Small-sample latency run showed all faster than align in this environment.

Risk assessment

• Scope is narrow and targeted to error paths uncovered in real runtime.

• No architectural behavior changes beyond compatibility and dtype safety.

• vLLM version: v0.16.0

• vLLM main: vllm-project/vllm@4034c3d

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