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source/cpu: disable AVX10 label
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Disable AVX10 as unnecessary as AVX10_LEVEL is better suited for
checking AVX10 compatibility. There is not yet any hardware with the
feature so disabling it shouldn't cause problems for users.
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marquiz committed May 24, 2024
1 parent 814255b commit ece6076
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Showing 6 changed files with 9 additions and 4 deletions.
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Expand Up @@ -24,6 +24,7 @@
# cpuid:
## NOTE: whitelist has priority over blacklist
# attributeBlacklist:
# - "AVX10"
# - "BMI1"
# - "BMI2"
# - "CLMUL"
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1 change: 1 addition & 0 deletions deployment/helm/node-feature-discovery/values.yaml
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Expand Up @@ -169,6 +169,7 @@ worker:
# cpuid:
## NOTE: whitelist has priority over blacklist
# attributeBlacklist:
# - "AVX10"
# - "BMI1"
# - "BMI2"
# - "CLMUL"
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Expand Up @@ -16,6 +16,7 @@ spec:
matchName:
op: NotIn
value:
- "AVX10"
- "BMI1"
- "BMI2"
- "CLMUL"
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2 changes: 1 addition & 1 deletion docs/reference/worker-configuration-reference.md
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Expand Up @@ -266,7 +266,7 @@ Prevent publishing cpuid features listed in this option.

> **NOTE:** overridden by `sources.cpu.cpuid.attributeWhitelist` (if specified)

Default: `[BMI1, BMI2, CLMUL, CMOV, CX16, ERMS, F16C, HTT, LZCNT, MMX, MMXEXT,
Default: `[AVX10, BMI1, BMI2, CLMUL, CMOV, CX16, ERMS, F16C, HTT, LZCNT, MMX, MMXEXT,
NX, POPCNT, RDRAND, RDSEED, RDTSCP, SGX, SGXLC, SSE, SSE2, SSE3, SSE4.1,
SSE4.2, SSSE3, TDX_GUEST]`

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7 changes: 4 additions & 3 deletions docs/usage/features.md
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Expand Up @@ -115,9 +115,10 @@ configuration options for details.
| VPCLMULQDQ | Carry-less multiplication quadword |
| WRMSRNS | Non-Serializing Write to Model Specific Register |

By default, the following CPUID flags have been blacklisted: BMI1, BMI2, CLMUL,
CMOV, CX16, ERMS, F16C, HTT, LZCNT, MMX, MMXEXT, NX, POPCNT, RDRAND, RDSEED,
RDTSCP, SGX, SSE, SSE2, SSE3, SSE4, SSE42, SSSE3 and TDX_GUEST. See
By default, the following CPUID flags have been blacklisted: AVX10 (use
AVX10_VERSION instead), BMI1, BMI2, CLMUL, CMOV, CX16, ERMS, F16C, HTT, LZCNT,
MMX, MMXEXT, NX, POPCNT, RDRAND, RDSEED, RDTSCP, SGX, SSE, SSE2, SSE3, SSE4,
SSE42, SSSE3 and TDX_GUEST. See
[`sources.cpu`](../reference/worker-configuration-reference.md#sourcescpu)
configuration options to change the behavior.

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1 change: 1 addition & 0 deletions source/cpu/cpu.go
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Expand Up @@ -64,6 +64,7 @@ func newDefaultConfig() *Config {
return &Config{
cpuidConfig{
AttributeBlacklist: []string{
"AVX10",
"BMI1",
"BMI2",
"CLMUL",
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