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test IM 1 interrupt, passed
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koron committed Apr 21, 2024
1 parent 1b1ef98 commit 51d1565
Showing 1 changed file with 51 additions and 1 deletion.
52 changes: 51 additions & 1 deletion cpu_test.go
Original file line number Diff line number Diff line change
Expand Up @@ -154,7 +154,7 @@ func testIM0(t *testing.T, n uint8) {
INT: tint,
}

// Start the program and HALT at 0x0101
// Start the program and HALT at 0x0102
if err := cpu.Run(ctx); err != nil {
t.Fatalf("unexpected error: %v", err)
}
Expand Down Expand Up @@ -190,3 +190,53 @@ func TestInterruptIM0(t *testing.T) {
})
}
}

func TestInterruptIM1(t *testing.T) {
ctx, cancel := context.WithTimeout(context.Background(), 3*time.Second)
defer cancel()

tint := &tINT{}
cpu := &CPU{
States: States{SPR: SPR{PC: 0x0100}, IM: 0},
Memory: MapMemory{}.
// HALT
Put(0x0000, 0x76).
// RETI
Put(0x0038, 0xed, 0x4d).
// IM 1 ; HALT ; HALT (for return)
Put(0x0100,
0xed, 0x56,
0x76,
),
IO: &tForbiddenIO{},
INT: tint,
}

// Start the program and HALT at 0x0102
if err := cpu.Run(ctx); err != nil {
t.Fatalf("unexpected error: %v", err)
}
if cpu.PC != 0x0102 {
t.Fatalf("unexpected PC: want=%04X got=%04X", 0x102, cpu.PC)
}
if cpu.IM != 1 {
t.Fatalf("unexpected interrupt mode: want=1 got=%d", cpu.IM)
}

// Interrupt with IM 1: with dummy empty byte array.
tint.data = []uint8{}
cpu.Step()
if cpu.PC != 0x0038 {
t.Fatalf("IM 1 interruption not work: want=%04X got=%04X", 0x0038, cpu.PC)
}

if err := cpu.Run(ctx); err != nil {
t.Fatalf("unexpected error: %v", err)
}
if cpu.PC != 0x0102 {
t.Fatalf("unexpected PC: want=%04X got=%04X", 0x102, cpu.PC)
}
if !tint.reti {
t.Fatalf("RETI is not processed, unexpectedly")
}
}

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