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perf(cuda): QMoE fused gate/up occupancy lever (ONNX_GENAI_QMOE_OCC, default-OFF) - #1167
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…h_bounds (byte-identical) The fused QMoE gate/up SwiGLU expert GEMV (qmoe_gate_up_activate) is the occupancy-limited kernel in the MoE decode path. Re-measured on the corrected DeepSeek-V2-Lite baseline (#1150, 64 experts, top-6, hidden=2048, inter=1408, int4 block-16, f32 activations) on H200: the default entry runs at 54 reg/thread -> 4 blocks/SM (50% theoretical, 43.3% achieved occupancy), DRAM only 9.1%, Long-Scoreboard bound on the int4 weight loads. Add opt-in _occ siblings with __launch_bounds__(256, 6): 54->40 reg/thread, 6 blocks/SM, spill-free (ncu local ld/st = 0 bytes). Occupancy 50->75% theoretical / 43.3->63.8% achieved, kernel duration 42.3->37.8us (-10.6%). (256, 8) reaches 32 reg/100% theoretical but spills 1.22 MB and regresses to 43.5us -- the register-granularity trap that also sank the down-projection occupancy attempt -- so 6 is shipped. Byte-identical by construction: __launch_bounds__ only constrains register allocation, so the FMA accumulate order, both block_sum reductions, and the SwiGLU are unchanged. New byte-identity A/B test asserts 0 differing bits between the default and _occ paths across f16/bf16/f32 and rows in {1,4,6,8}. E2E V2-Lite decode A/B (interleaved, runs=10, warmups=2): -1.0% median decode (56.6->57.2 tok/s) over 3 clean rounds, generated token ids byte-identical to the merged golden under both flag states. Default-OFF behind ONNX_GENAI_QMOE_OCC=1; symmetric int4 only (asymmetric _zp path untouched). Investigation finding: the other QMoE expert-GEMV kernels have no comparable occupancy headroom -- qmoe_linear (fc2/down) is already 32 reg/100% theoretical occupancy, and the M>1 batched path (qmoe_grouped_linear) already dequants each weight once and reuses it across TILE_M=8 rows -- so gate/up is the sole remaining occupancy lever in the family. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
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Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## main #1167 +/- ##
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+ Coverage 0 80.44% +80.44%
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Files 0 359 +359
Lines 0 157323 +157323
Branches 0 157323 +157323
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+ Hits 0 126564 +126564
- Misses 0 26196 +26196
- Partials 0 4563 +4563
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QMoE gate/up SwiGLU expert-GEMV occupancy lever
Ports the dense #1139 gate/up occupancy win into the fused gate/up SwiGLU expert GEMV (the MoE analog). New flag
ONNX_GENAI_QMOE_OCC, default-OFF.ncu evidence (spill-verified)
_occ (256,6)Register-granularity trap avoided:
(256,8)→ 32 reg/100% theoretical but spills 1.22 MB → regression. Shipped block config 6.qmoe_linear(fc2/down) already at 32 reg/100% (no lever); grouped-GEMM M>1 path already dequants-once with TILE_M=8. Gate/up is the sole remaining occupancy target.Parity — byte-identical
qmoe_occ_is_bit_identical: 0 differing bits (f16/bf16/f32 × rows{1,4,6,8})qmoe_gpusuite: 32/32 pass (re-verified post-rebase onto current main)[…207,16,24,1012,1712,5075…]E2E
V2-Lite decode ~−1.0% median (56.6→57.2 tok/s, runs=10 warmups=2, 3 rounds). Small because gate/up ≈8% of V2-Lite decode (MLA/Attention ≈21% dominates a different lane); bigger-intermediate MoE would convert more.
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_occfor any QMoE QuantLayout when enabled (not literally symmetric-int4-only); affine OCC smoke tests pass; default-OFF keeps it non-blocking.Co-authored-by: Copilot 223556219+Copilot@users.noreply.github.com