Fix SPI clocks and rtc_watchdog example
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jessebraham
reviewed
Feb 27, 2023
| @@ -694,6 +694,7 @@ impl WatchdogDisable for Rwdt { | |||
| } | |||
| } | |||
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| // TODO: this can be refactored | |||
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Could you elaborate on this please? Most of the codebase could be refactored.
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| let pcr = &*esp32c6::PCR::PTR; | ||
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| // use default clock source PLL_F80M_CLK | ||
| pcr.spi2_clkm_conf.modify(|_, w| w.spi2_clkm_sel().bits(1)); |
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Suggested change
| let pcr = &*esp32c6::PCR::PTR; | |
| // use default clock source PLL_F80M_CLK | |
| pcr.spi2_clkm_conf.modify(|_, w| w.spi2_clkm_sel().bits(1)); | |
| // use default clock source PLL_F80M_CLK | |
| (&*esp32c6::PCR::PTR).spi2_clkm_conf.modify(|_, w| w.spi2_clkm_sel().bits(1)); |
No point binding to a variable here if it's only referenced once.
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Never mind, I have some other cleanup to do after this is merged anyway so I'll just take care of it myself. Thanks! |
jessebraham
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Feb 27, 2023
* Create the `esp32c6-hal` package * Teach `esp-hal-common` about the ESP32-C6 * Get a number of peripheral drivers building for the ESP32-C6 bckup initial clocks_ii * Create the `esp32c6-hal` package C6: update * Simplify and fix the linker script update * C6: add I2S * Create the `esp32c6-hal` package * Teach `esp-hal-common` about the ESP32-C6 * Get a number of peripheral drivers building for the ESP32-C6 bckup initial clocks_ii * Create the `esp32c6-hal` package * C6: update * Simplify and fix the linker script * update * C6: add I2S * update * C6 Interrupts * C6: Update build.rs, linker scripts and initial examples * C6: RMT * Fix interrupt handling * Fix `ClockControl::configure` * C6: revert to I2S0 instead of just I2S * C6: rebase and update * RTC not buildable * Implement RWDT and SWD disable * C6: working LEDC * C6: working RMT * C6: add aes * C6: add mcpwm * C6: add rtc_cntln - not finished * C6: update and formatting * C6: add pcnt * C6: add examples and format * Remove inline assembly, fix interrupts and linker scripts * Remove unused features, update cargo config for atomic emu, misc cleanup * Get ADC building and example "working" (as much as it ever does) * Remove a bunch of unused constants which were copied from ESP-IDF * The `mcpwm` example now works correctly * Get `TWAI` peripheral driver building for C6 * Clean up the `rtc_cntl` module and get all the other HALs building again * Add the C6 to our CI workflow * Fix various things that have been missed when rebasing Still missing a few examples (`clock_monitor`, `embassy_spi`, `ram`) * C6: Small updates in wdt (#1) * C6: Update WDT * C6: Update examples with WDT update * Update `esp-println` dependency to fix build errors * Fix formatting issues causing pre-commit hook to fail * Get some more examples working * Working `ram` example * Sync with changes in `main` after rebasing * Working `embassy_spi` example * Use a git dependency for the PAC until we publish a release * Fix I2S for ESP32-C6 * Fix esp32c6 direct boot (#4) * Add direct boot support for C6 * Fix direct boot for c6 - Actually copy into rtc ram - remove dummy section that is no longer needed (was just a waste of flash space) - Move RTC stuff before the no load sections * Update RWDT and refactor RTC (#3) * C6: Update RWDT and add example, refactor RTC and add not-really-good example * Update based on review comments, resolve bunch of warnings and run cargo fmt * Update C6 esp-pacs rev commit * Fix clocks_ll/esp32c6.rs * Fix riscv interrupts * Remove clock_monitor example for now * RAM example works in direct-boot mode * Add a TODO for &mut TIMG0 and cargo fmt * Fix linker script after a bad rebase * Update CI and Cargo.toml embassy required features * use riscv32imac-unknown-none-elf target for C6 in CI * change default target to riscv32imac-unknown-none-elf * add riscv32imac-unknown-none-elf target to MSRV job * another cleanup --------- Co-authored-by: bjoernQ <[email protected]> Co-authored-by: Jesse Braham <[email protected]> * Make required changes to include new `RADIO` peripheral * Use published versions of PAC and `esp-println` * Use the correct target extensions (`imac`) * Fix the super watchdog timer, plus a few more examples * Fix UART clock configuration * Make sure to sync UART registers when configuring AT cmd detection * Disable APM in direct-boot mode * Address a number of review comments * Fix `SPI` clocks and `rtc_watchdog` example (#6) * fix SPI clocks * run cargo fmt * Add comment about used default clk src * Fix rtc_watchdog example in BL mode * run cargo fmt * Update rtc_watchdog example that it works in DB mode * README and example fixes/cleanup * Add I2C peripheral enable and reset * Fix `ApbSarAdc` configuration in `system.rs` --------- Co-authored-by: bjoernQ <[email protected]> Co-authored-by: Juraj Sadel <[email protected]> Co-authored-by: Juraj Sadel <[email protected]> Co-authored-by: Scott Mabin <[email protected]>
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This PR should resolve the issues marked as
clockissues here in SPI examples and should fix (at least now is closer to 5secs than before) thertc_watchdogdelayin BL mode.