Comprehensive documentation and resources for the Parallax Propeller 2 (P2) multicore microcontroller
→ USING WITH AI GUIDE
Start here if you're using Claude Code, GitHub Copilot, or other AI assistants! Complete guide on how to set up and use this knowledge base with AI systems, including example prompts and usage patterns.
→ PRIVACY GUIDE FOR DEVELOPERS 📔
Essential reading before using AI tools! Learn how to protect your intellectual property, understand data handling policies, and follow best practices for AI-assisted P2 development.
→ AI Reference Documentation
Complete P2 instruction set, architecture details, and code patterns optimized for LLM consumption. Structured for accurate code generation with comprehensive examples and constraints.
→ Developer Documentation
Quick-start guides, programming patterns, and practical examples. Everything needed to begin P2 development, from basic concepts to advanced multicore techniques.
→ Learning Paths
Structured tutorials progressing from fundamentals to expertise. Includes migration guides for P1 developers and hands-on exercises for mastering P2 capabilities.
→ Technical Reference
Authoritative instruction set documentation, hardware specifications, and architectural details. The definitive source for P2 technical information.
The Propeller 2 (P2X8C4M64P) is a symmetric multicore microcontroller featuring 8 identical 32-bit processors (COGs) that execute independently while sharing resources. Unlike traditional microcontrollers, the P2 provides true parallel processing with deterministic timing, making it ideal for real-time applications.
- 8 Independent COGs: 90 MIPS each (720 MIPS total @ 180 MHz), true parallel execution
- Dual Memory Model: Each COG has 4KB private RAM; all share 512KB Hub RAM
- Execute from Anywhere: COGs can run code from COG RAM, LUT RAM, or Hub RAM
- No Resource Contention: Each COG has dedicated registers, no cache misses or pipeline stalls
- 64 Autonomous I/O Pins: Each pin independently handles complex operations
- Built-in Protocols: UART, SPI, I²C, USB, quadrature decoding without CPU overhead
- Analog & Digital: 14-bit ADC, 16-bit DAC, PWM, and video generation per pin
- Offload Everything: Smart Pins run autonomously, freeing COGs for application logic
- Deterministic Timing: Count cycles exactly, no interrupt latency
- Hardware Parallelism: No RTOS needed - hardware handles multiprocessing
- CORDIC Math Engine: Hardware multiply, divide, trig, and logarithms
- Mixed Languages: Spin2 (high-level), PASM2 (assembly), C/C++, Python
The P2 Knowledge Base provides comprehensive, AI-optimized documentation for the Propeller 2. Our goal is enabling both human developers and AI systems to effectively utilize the P2's unique parallel processing capabilities through accurate, structured documentation.
We welcome contributions! See CONTRIBUTING.md for guidelines.
This project is licensed under the MIT License - see LICENSE for details.
Built with intention for the P2 community
