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@hanhanW hanhanW commented Jul 18, 2025

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LGTM

@hanhanW hanhanW changed the title [CPU] Use lowering config attribute interface in LLVMCPUTileAndFuse. [CPU] Propagate cache tiling sizes in lowering config propagation. Jul 18, 2025
@hanhanW hanhanW force-pushed the tile-and-fuse-interface branch from ec13a02 to 7e95f3b Compare July 18, 2025 17:30
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hanhanW commented Jul 18, 2025

The previous crash should be fixed by #21410, so this depends on the other PR.

The issue is that the lowering config is not consistent, so the tilingConfig from root op treats cache level tiling is valid while the other ops do not.

@hanhanW hanhanW marked this pull request as draft July 18, 2025 17:33
@hanhanW hanhanW changed the title [CPU] Propagate cache tiling sizes in lowering config propagation. [CPU] Use lowering config attribute interface in LLVMCPUTileAndFuse. Jul 18, 2025
@hanhanW hanhanW force-pushed the tile-and-fuse-interface branch from 7e95f3b to 1578e4f Compare July 21, 2025 17:19
@hanhanW hanhanW marked this pull request as ready for review July 21, 2025 17:24
@hanhanW hanhanW enabled auto-merge (squash) July 21, 2025 17:25
@hanhanW hanhanW merged commit 28c2301 into iree-org:main Jul 21, 2025
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@hanhanW hanhanW deleted the tile-and-fuse-interface branch July 21, 2025 17:59
keshavvinayak01 pushed a commit to keshavvinayak01/iree that referenced this pull request Sep 4, 2025
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3 participants