[SYCL] Implement sycl-post-link tool

llvm/test/tools/sycl-post-link/basic-module-split.ll

@@ -0,0 +1,121 @@
+; RUN: sycl-post-link -S %s -o %out
+; RUN: FileCheck %s -input-file=%out_0.ll --check-prefixes CHECK-TU0,CHECK
+; RUN: FileCheck %s -input-file=%out_1.ll --check-prefixes CHECK-TU1,CHECK
+; RUN: FileCheck %s -input-file=%out_0.txt --check-prefixes CHECK-TU0-TXT
+; RUN: FileCheck %s -input-file=%out_1.txt --check-prefixes CHECK-TU1-TXT
+; ModuleID = 'basic-module-split.ll'
+source_filename = "basic-module-split.ll"
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64-unknown-linux-sycldevice"
+
+$_Z3barIiET_S0_ = comdat any
+
+;CHECK-TU0-NOT: @{{.*}}GV{{.*}}
+;CHECK-TU1: @{{.*}}GV{{.*}} = internal addrspace(1) constant [1 x i32] [i32 42], align 4
+@_ZL2GV = internal addrspace(1) constant [1 x i32] [i32 42], align 4
+
+; CHECK-TU0: define dso_local spir_kernel void @{{.*}}TU0_kernel0{{.*}}
+; CHECK-TU0-TXT: {{.*}}TU0_kernel0{{.*}}
+; CHECK-TU1-NOT: define dso_local spir_kernel void @{{.*}}TU0_kernel0{{.*}}
+; CHECK-TU1-TXT-NOT: {{.*}}TU0_kernel0{{.*}}
+
+; CHECK-TU0: call spir_func void @{{.*}}foo{{.*}}()
+
+define dso_local spir_kernel void @_ZTSZ4mainE11TU0_kernel0() #0 {
+entry:
+  call spir_func void @_Z3foov()
+  ret void
+}
+
+; CHECK-TU0: define dso_local spir_func void @{{.*}}foo{{.*}}()
+; CHECK-TU1-NOT: define dso_local spir_func void @{{.*}}foo{{.*}}()
+
+; CHECK-TU0: call spir_func i32 @{{.*}}bar{{.*}}(i32 1)
+
+define dso_local spir_func void @_Z3foov() {
+entry:
+  %a = alloca i32, align 4
+  %call = call spir_func i32 @_Z3barIiET_S0_(i32 1)
+  %add = add nsw i32 2, %call
+  store i32 %add, i32* %a, align 4
+  ret void
+}
+
+; CHECK-TU0: define {{.*}} spir_func i32 @{{.*}}bar{{.*}}(i32 %arg)
+; CHECK-TU1-NOT: define {{.*}} spir_func i32 @{{.*}}bar{{.*}}(i32 %arg)
+
+; Function Attrs: nounwind
+define linkonce_odr dso_local spir_func i32 @_Z3barIiET_S0_(i32 %arg) comdat {
+entry:
+  %arg.addr = alloca i32, align 4
+  store i32 %arg, i32* %arg.addr, align 4
+  %0 = load i32, i32* %arg.addr, align 4
+  ret i32 %0
+}
+
+; CHECK-TU0: define dso_local spir_kernel void @{{.*}}TU0_kernel1{{.*}}()
+; CHECK-TU0-TXT: {{.*}}TU0_kernel1{{.*}}
+; CHECK-TU1-NOT: define dso_local spir_kernel void @{{.*}}TU0_kernel1{{.*}}()
+; CHECK-TU1-TXT-NOT: {{.*}}TU0_kernel1{{.*}}
+
+; CHECK-TU0: call spir_func void @{{.*}}foo1{{.*}}()
+
+define dso_local spir_kernel void @_ZTSZ4mainE11TU0_kernel1() #0 {
+entry:
+  call spir_func void @_Z4foo1v()
+  ret void
+}
+
+; CHECK-TU0: define dso_local spir_func void @{{.*}}foo1{{.*}}()
+; CHECK-TU1-NOT: define dso_local spir_func void @{{.*}}foo1{{.*}}()
+
+; Function Attrs: nounwind
+define dso_local spir_func void @_Z4foo1v() {
+entry:
+  %a = alloca i32, align 4
+  store i32 2, i32* %a, align 4
+  ret void
+}
+
+; CHECK-TU0-NOT: define dso_local spir_kernel void @{{.*}}TU1_kernel{{.*}}()
+; CHECK-TU0-TXT-NOT: {{.*}}TU1_kernel{{.*}}
+; CHECK-TU1: define dso_local spir_kernel void @{{.*}}TU1_kernel{{.*}}()
+; CHECK-TU1-TXT: {{.*}}TU1_kernel{{.*}}
+
+; CHECK-TU1: call spir_func void @{{.*}}foo2{{.*}}()
+
+define dso_local spir_kernel void @_ZTSZ4mainE10TU1_kernel() #1 {
+entry:
+  call spir_func void @_Z4foo2v()
+  ret void
+}
+
+; CHECK-TU0-NOT: define dso_local spir_func void @{{.*}}foo2{{.*}}()
+; CHECK-TU1: define dso_local spir_func void @{{.*}}foo2{{.*}}()
+
+; Function Attrs: nounwind
+define dso_local spir_func void @_Z4foo2v() {
+entry:
+  %a = alloca i32, align 4
+; CHECK-TU1: %0 = load i32, i32 addrspace(4)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(4)* addrspacecast ([1 x i32] addrspace(1)* @{{.*}}GV{{.*}} to [1 x i32] addrspace(4)*), i64 0, i64 0), align 4
+  %0 = load i32, i32 addrspace(4)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(4)* addrspacecast ([1 x i32] addrspace(1)* @_ZL2GV to [1 x i32] addrspace(4)*), i64 0, i64 0), align 4
+  %add = add nsw i32 4, %0
+  store i32 %add, i32* %a, align 4
+  ret void
+}
+
+attributes #0 = { "sycl-module-id"="TU1.cpp" }
+attributes #1 = { "sycl-module-id"="TU2.cpp" }
+
+; Metadata is saved in both modules.
+; CHECK: !opencl.spir.version = !{!0, !0}
+; CHECK: !spirv.Source = !{!1, !1}
+
+!opencl.spir.version = !{!0, !0}
+!spirv.Source = !{!1, !1}
+
+; CHECK; !0 = !{i32 1, i32 2}
+; CHECK; !1 = !{i32 4, i32 100000}
+
+!0 = !{i32 1, i32 2}
+!1 = !{i32 4, i32 100000}

llvm/test/tools/sycl-post-link/one-kernel-per-module.ll

@@ -0,0 +1,132 @@
+; RUN: sycl-post-link --one-kernel -S %s -o %out
+; RUN: FileCheck %s -input-file=%out_0.ll --check-prefixes CHECK-MODULE0,CHECK
+; RUN: FileCheck %s -input-file=%out_1.ll --check-prefixes CHECK-MODULE1,CHECK
+; RUN: FileCheck %s -input-file=%out_2.ll --check-prefixes CHECK-MODULE2,CHECK
+; RUN: FileCheck %s -input-file=%out_0.txt --check-prefixes CHECK-MODULE0-TXT
+; RUN: FileCheck %s -input-file=%out_1.txt --check-prefixes CHECK-MODULE1-TXT
+; RUN: FileCheck %s -input-file=%out_2.txt --check-prefixes CHECK-MODULE2-TXT
+; ModuleID = 'basic-module-split.ll'
+source_filename = "basic-module-split.ll"
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir64-unknown-linux-sycldevice"
+
+$_Z3barIiET_S0_ = comdat any
+
+;CHECK-MODULE0-NOT: @{{.*}}GV{{.*}}
+;CHECK-MODULE1-NOT: @{{.*}}GV{{.*}}
+;CHECK-MODULE2: @{{.*}}GV{{.*}} = internal addrspace(1) constant [1 x i32] [i32 42], align 4
+@_ZL2GV = internal addrspace(1) constant [1 x i32] [i32 42], align 4
+
+; CHECK-MODULE0: define dso_local spir_kernel void @{{.*}}TU0_kernel0{{.*}}
+; CHECK-MODULE0-TXT: {{.*}}TU0_kernel0{{.*}}
+; CHECK-MODULE1-NOT: define dso_local spir_kernel void @{{.*}}TU0_kernel0{{.*}}
+; CHECK-MODULE1-TXT-NOT: {{.*}}TU0_kernel0{{.*}}
+
+; CHECK-MODULE0: call spir_func void @{{.*}}foo{{.*}}()
+
+define dso_local spir_kernel void @TU0_kernel0() #0 {
+entry:
+  call spir_func void @_Z3foov()
+  ret void
+}
+
+; CHECK-MODULE0: define dso_local spir_func void @{{.*}}foo{{.*}}()
+; CHECK-MODULE1-NOT: define dso_local spir_func void @{{.*}}foo{{.*}}()
+; CHECK-MODULE2-NOT: define dso_local spir_func void @{{.*}}foo{{.*}}()
+
+; CHECK-MODULE0: call spir_func i32 @{{.*}}bar{{.*}}(i32 1)
+
+define dso_local spir_func void @_Z3foov() {
+entry:
+  %a = alloca i32, align 4
+  %call = call spir_func i32 @_Z3barIiET_S0_(i32 1)
+  %add = add nsw i32 2, %call
+  store i32 %add, i32* %a, align 4
+  ret void
+}
+
+; CHECK-MODULE0: define {{.*}} spir_func i32 @{{.*}}bar{{.*}}(i32 %arg)
+; CHECK-MODULE1-NOT: define {{.*}} spir_func i32 @{{.*}}bar{{.*}}(i32 %arg)
+; CHECK-MODULE2-NOT: define {{.*}} spir_func i32 @{{.*}}bar{{.*}}(i32 %arg)
+
+; Function Attrs: nounwind
+define linkonce_odr dso_local spir_func i32 @_Z3barIiET_S0_(i32 %arg) comdat {
+entry:
+  %arg.addr = alloca i32, align 4
+  store i32 %arg, i32* %arg.addr, align 4
+  %0 = load i32, i32* %arg.addr, align 4
+  ret i32 %0
+}
+
+; CHECK-MODULE0-NOT: define dso_local spir_kernel void @{{.*}}TU0_kernel1{{.*}}()
+; CHECK-MODULE0-TXT-NOT: {{.*}}TU0_kernel1{{.*}}
+; CHECK-MODULE1: define dso_local spir_kernel void @{{.*}}TU0_kernel1{{.*}}()
+; CHECK-MODULE1-TXT: {{.*}}TU0_kernel1{{.*}}
+; CHECK-MODULE2-NOT: define dso_local spir_kernel void @{{.*}}TU0_kernel1{{.*}}()
+; CHECK-MODULE2-TXT-NOT: {{.*}}TU0_kernel1{{.*}}
+
+; CHECK-MODULE1: call spir_func void @{{.*}}foo1{{.*}}()
+
+define dso_local spir_kernel void @TU0_kernel1() #0 {
+entry:
+  call spir_func void @_Z4foo1v()
+  ret void
+}
+
+; CHECK-MODULE0-NOT: define dso_local spir_func void @{{.*}}foo1{{.*}}()
+; CHECK-MODULE1: define dso_local spir_func void @{{.*}}foo1{{.*}}()
+; CHECK-MODULE2-NOT: define dso_local spir_func void @{{.*}}foo1{{.*}}()
+
+; Function Attrs: nounwind
+define dso_local spir_func void @_Z4foo1v() {
+entry:
+  %a = alloca i32, align 4
+  store i32 2, i32* %a, align 4
+  ret void
+}
+
+; CHECK-MODULE0-NOT: define dso_local spir_kernel void @{{.*}}TU1_kernel{{.*}}()
+; CHECK-MODULE0-TXT-NOT: {{.*}}TU1_kernel{{.*}}
+; CHECK-MODULE1-NOT: define dso_local spir_kernel void @{{.*}}TU1_kernel{{.*}}()
+; CHECK-MODULE1-TXT-NOT: {{.*}}TU1_kernel{{.*}}
+; CHECK-MODULE2: define dso_local spir_kernel void @{{.*}}TU1_kernel{{.*}}()
+; CHECK-MODULE2-TXT: {{.*}}TU1_kernel{{.*}}
+
+; CHECK-MODULE2: call spir_func void @{{.*}}foo2{{.*}}()
+
+define dso_local spir_kernel void @TU1_kernel() #1 {
+entry:
+  call spir_func void @_Z4foo2v()
+  ret void
+}
+
+; CHECK-MODULE0-NOT: define dso_local spir_func void @{{.*}}foo2{{.*}}()
+; CHECK-MODULE1-NOT: define dso_local spir_func void @{{.*}}foo2{{.*}}()
+; CHECK-MODULE2: define dso_local spir_func void @{{.*}}foo2{{.*}}()
+
+; Function Attrs: nounwind
+define dso_local spir_func void @_Z4foo2v() {
+entry:
+  %a = alloca i32, align 4
+; CHECK-MODULE2: %0 = load i32, i32 addrspace(4)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(4)* addrspacecast ([1 x i32] addrspace(1)* @{{.*}}GV{{.*}} to [1 x i32] addrspace(4)*), i64 0, i64 0), align 4
+  %0 = load i32, i32 addrspace(4)* getelementptr inbounds ([1 x i32], [1 x i32] addrspace(4)* addrspacecast ([1 x i32] addrspace(1)* @_ZL2GV to [1 x i32] addrspace(4)*), i64 0, i64 0), align 4
+  %add = add nsw i32 4, %0
+  store i32 %add, i32* %a, align 4
+  ret void
+}
+
+attributes #0 = { "sycl-module-id"="TU1.cpp" }
+attributes #1 = { "sycl-module-id"="TU2.cpp" }
+
+; Metadata is saved in both modules.
+; CHECK: !opencl.spir.version = !{!0, !0}
+; CHECK: !spirv.Source = !{!1, !1}
+
+!opencl.spir.version = !{!0, !0}
+!spirv.Source = !{!1, !1}
+
+; CHECK; !0 = !{i32 1, i32 2}
+; CHECK; !1 = !{i32 4, i32 100000}
+
+!0 = !{i32 1, i32 2}
+!1 = !{i32 4, i32 100000}

llvm/tools/LLVMBuild.txt

@@ -56,6 +56,7 @@ subdirectories =
  llvm-split
  llvm-undname
  opt
+ sycl-post-link
  verify-uselistorder
 
 [component_0]

llvm/tools/sycl-post-link/CMakeLists.txt

@@ -0,0 +1,14 @@
+set(LLVM_LINK_COMPONENTS
+  BitWriter
+  Core
+  IPO
+  IRReader
+  Support
+  )
+
+add_llvm_tool(sycl-post-link
+  sycl-post-link.cpp
+
+  DEPENDS
+  intrinsics_gen
+  )

llvm/tools/sycl-post-link/LLVMBuild.txt

@@ -0,0 +1,21 @@
+;===- ./tools/sycl-post-link/LLVMBuild.txt ---------------------*- Conf -*--===;
+;
+; Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+; See https://llvm.org/LICENSE.txt for license information.
+; SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+;
+;===------------------------------------------------------------------------===;
+;
+; This is an LLVMBuild description file for the components in this subdirectory.
+;
+; For more information on the LLVMBuild system, please see:
+;
+;   http://llvm.org/docs/LLVMBuild.html
+;
+;===------------------------------------------------------------------------===;
+
+[component_0]
+type = Tool
+name = sycl-post-link
+parent = Tools
+required_libraries = AsmParser BitReader BitWriter IRReader IPO