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@JackAKirk JackAKirk commented Aug 4, 2022

I've added the bmad (nvptx backend only) feature description that has made use of precision::b1 in the implementation here: #5363

I can also add some other nvidia specific information as requested. I've currently added details for the CUDA specific element wise ops feature.

NOTE: this is intended to be merged into #6157, not the intel/sycl branch.

@JackAKirk JackAKirk requested a review from a team as a code owner August 4, 2022 14:12
@JackAKirk JackAKirk closed this Aug 4, 2022
@JackAKirk JackAKirk reopened this Aug 4, 2022
@JackAKirk JackAKirk marked this pull request as draft August 4, 2022 14:16
@JackAKirk JackAKirk requested a review from dkhaldi August 4, 2022 14:16
JackAKirk and others added 5 commits August 4, 2022 17:00
Signed-off-by: JackAKirk <[email protected]>
Signed-off-by: JackAKirk <[email protected]>
Signed-off-by: JackAKirk <[email protected]>
@bader bader deleted the branch intel:fill-piece-wise-ops August 20, 2022 06:36
@bader bader closed this Aug 20, 2022
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2 participants