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@smaslov-intel smaslov-intel commented Feb 1, 2022

We were not properly querying Level-Zero for the levels of USM support (opportunistically assumed all capabilities).
Also, the "atomic" USM in SYCL really means "concurrent atomic":

support this capability may concurrently access and atomically modify shared allocations.

E2E test is coming in: intel/llvm-test-suite#794

Signed-off-by: Sergey V Maslov [email protected]

@smaslov-intel smaslov-intel requested a review from a team as a code owner February 1, 2022 04:39
@smaslov-intel smaslov-intel requested a review from a team as a code owner February 1, 2022 16:28
@vladimirlaz
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could you please provide more details on the change in the descrption?

@againull againull merged commit 5941394 into intel:sycl Feb 2, 2022
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3 participants