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[SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs #3643

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Merged
bader merged 6 commits into from
Jun 29, 2021
Merged

[SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs #3643

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068788c
Change fpga_reg interface to only allow trivially copyable structs,
ajaykumarkannan Apr 13, 2021
18696ab
Add newline at EOF
ajaykumarkannan Apr 21, 2021
1fa673b
Fix a typo in fpga_reg.hpp
ajaykumarkannan Apr 21, 2021
37739ac
Add type_traits as include to fpga_reg.hpp
ajaykumarkannan May 13, 2021
ccca3ba
Using a static assert in fpga_reg instead of a type_trait in the func…
ajaykumarkannan May 17, 2021
079f31a
Change fpga_reg to use a deprecation warning for old APIs
ajaykumarkannan May 25, 2021
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7 changes: 3 additions & 4 deletions sycl/include/CL/sycl/INTEL/fpga_reg.hpp
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Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,9 @@ namespace INTEL {
// Returns a registered copy of the input
// This function is intended for FPGA users to instruct the compiler to insert
// at least one register stage between the input and the return value.
template <typename _T>
typename std::enable_if<std::is_trivially_copyable<_T>::value, _T>::type
fpga_reg(_T t) {
template <typename _T> _T fpga_reg(_T t) {
static_assert(std::is_trivially_copyable<_T>::value,
"Type is not trivially_copyable.");
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@keryell keryell May 18, 2021

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Yes, that looks simple and understandable. :-)

#if __has_builtin(__builtin_intel_fpga_reg)
return __builtin_intel_fpga_reg(t);
#else
Expand All @@ -31,4 +31,3 @@ fpga_reg(_T t) {
} // namespace INTEL
} // namespace sycl
} // __SYCL_INLINE_NAMESPACE(cl)