Skip to content

[SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs #3643

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
bader merged 6 commits into from
Jun 29, 2021
Merged

[SYCL] Allow fpga_reg only for PODs and Trivially-copyable structs #3643

Changes from 4 commits
Commits
Show all changes
6 commits
Select commit Hold shift + click to select a range
068788c
Change fpga_reg interface to only allow trivially copyable structs,
ajaykumarkannan Apr 13, 2021
18696ab
Add newline at EOF
ajaykumarkannan Apr 21, 2021
1fa673b
Fix a typo in fpga_reg.hpp
ajaykumarkannan Apr 21, 2021
37739ac
Add type_traits as include to fpga_reg.hpp
ajaykumarkannan May 13, 2021
ccca3ba
Using a static assert in fpga_reg instead of a type_trait in the func…
ajaykumarkannan May 17, 2021
079f31a
Change fpga_reg to use a deprecation warning for old APIs
ajaykumarkannan May 25, 2021
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
15 changes: 7 additions & 8 deletions sycl/include/CL/sycl/INTEL/fpga_reg.hpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,12 +9,18 @@
#pragma once

#include <CL/sycl/detail/defines.hpp>
#include <type_traits>

__SYCL_INLINE_NAMESPACE(cl) {
namespace sycl {
namespace INTEL {

template <typename _T> _T fpga_reg(const _T &t) {
// Returns a registered copy of the input
// This function is intended for FPGA users to instruct the compiler to insert
// at least one register stage between the input and the return value.
template <typename _T>
typename std::enable_if<std::is_trivially_copyable<_T>::value, _T>::type
fpga_reg(_T t) {
#if __has_builtin(__builtin_intel_fpga_reg)
return __builtin_intel_fpga_reg(t);
#else
Expand All @@ -26,10 +32,3 @@ template <typename _T> _T fpga_reg(const _T &t) {
} // namespace sycl
} // __SYCL_INLINE_NAMESPACE(cl)

// Keep it consistent with FPGA attributes like intelfpga::memory()
// Currently clang does not support nested namespace for attributes
namespace intelfpga {
template <typename _T> _T fpga_reg(const _T &t) {
return cl::sycl::INTEL::fpga_reg(t);
}
} // namespace intelfpga