[SYCL] submit barrier command to execution (see issue #3000)#3045
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romanovvlad merged 1 commit intointel:syclfrom Jan 27, 2021
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[SYCL] submit barrier command to execution (see issue #3000)#3045romanovvlad merged 1 commit intointel:syclfrom
romanovvlad merged 1 commit intointel:syclfrom
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Signed-off-by: Sergey V Maslov <sergey.v.maslov@intel.com>
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TODO: Wait for #3081 to merge and re-base. |
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Associated changes: - Added function stubs to PME: necessary for compilation. - Stricter SYCL hardware compatibility checks: limits on subgroup size and the availability of local memory. - The kernel implementation and overall logic closely follow the OpenCL implementation. Divergences are documented locally. Limitations: - No fine-grained timings yet. - Code-duplication with CUDA and OpenCL: see #2608. - Minor differences in local/nonlocal synchronization: see #3895, related to #2608. - Only the OpenCL backend was extensively tested. LevelZero works fine without MPI but stalls due to a known bug. The fix for DPCPP runtime is available, but not yet part of any OneAPI release: intel/llvm#3045. - The complex/position-restraints regression test fails: see #3846. - No performance tuning: see #3847. Performance on rnase-cubic system is similar to OpenCL implementation.
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Associated changes: - Added function stubs to PME: necessary for compilation. - Stricter SYCL hardware compatibility checks: limits on subgroup size and the availability of local memory. - The kernel implementation and overall logic closely follow the OpenCL implementation. Divergences are documented locally. Limitations: - No fine-grained timings yet. - Code-duplication with CUDA and OpenCL: see #2608. - Minor differences in local/nonlocal synchronization: see #3895, related to #2608. - Only the OpenCL backend was extensively tested. LevelZero works fine without MPI but stalls due to a known bug. The fix for DPCPP runtime is available, but not yet part of any OneAPI release: intel/llvm#3045. - The complex/position-restraints regression test fails: see #3846. - No performance tuning: see #3847. Performance on rnase-cubic system is similar to OpenCL implementation.
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llvm-spirv.cpp was relying on transitive includes for these. Also remove an unneeded `<set>` include. Original commit: KhronosGroup/SPIRV-LLVM-Translator@cedb8ae2e22102e
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Fixes #3000
A submission of the barrier was missing.
Test: intel/llvm-test-suite#98
Signed-off-by: Sergey V Maslov sergey.v.maslov@intel.com