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[SYCL][DOC][SPIRV] Added a SPIR-V extension that introduces two new storage classes. #1840
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With this extension 2 new Storage Classes are introduced: DeviceOnlyINTEL and HostOnlyINTEL appropriately mapped on global_device and global_host SYCL/OpenCL address spaces which are part of SYCL_INTEL_usm_address_spaces extension. In case if device doesn't support SPV_INTEL_usm_storage_classes extension global_device and global_host address spaces are lowered to just global address space and therefore new Storage Classes are lowered to CrossWorkgroup storage class. Also this patch introduces a flag 'enable-usm-addrspaces' that enables generation of global_device and global_host address spaces during reversed translation. Spec: intel/llvm#1840 Co-authored-by: Viktoria Maksimova <[email protected]> Signed-off-by: Dmitry Sidorov <[email protected]> Signed-off-by: Viktoria Maksimova <[email protected]>
There is an issue I faced during upstreaming the implementation in KhronosGroup/SPIRV-LLVM-Translator#579 . The issue is that spirv-val tool checks input/output parameters of GenericCastToPtr/PtrCastToGeneric instructions. And the current specification and therefore implementation violates the rules for these casts. I can prepare a patch to the SPIR-V validation tool, but not sure if it will be accepted. Taking it into the account, does it make sense to remake casts by adding new instructions? |
It's not really blocking us, since I can just disable spirv-val tool in the testing, but it's kinda lame.
Well, actually, I can give it a try. The new rules shall be applied under: but for that we need to upstream the allocations from the extension to https://github.com/KhronosGroup/SPIRV-Headers first. |
…f the existing ones.
I changed the spec to add two new instructions for converting from device/host to crossworkgroup or vice versa instead of augmenting the existing conversion instructions. |
…ddress spaces to SYCL to enable additional optimization.
Added a SYCL extension to expose the SPIR-V extension. |
Modify Section 3.36.11, Conversion Instructions, adding two new instructions as follows: | ||
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3+^| *OpPtrCastToCrossWorkgroupINTEL* |
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3+^| *OpPtrCastToCrossWorkgroupINTEL* | |
4+| *OpPtrCastToCrossWorkgroupINTEL* |
_Result Type_ and _Pointer_ must point to the same type. 2+^| Capability: + | ||
*USMStorageClassesINTEL* |
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_Result Type_ and _Pointer_ must point to the same type. 2+^| Capability: + | |
*USMStorageClassesINTEL* | |
_Result Type_ and _Pointer_ must point to the same type. 1+| Capability: + | |
*USMStorageClassesINTEL* |
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3+^| *OpCrossWorkgroupCastToPtrINTEL* |
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3+^| *OpCrossWorkgroupCastToPtrINTEL* | |
4+| *OpCrossWorkgroupCastToPtrINTEL* |
_Result Type_ and _Pointer_ must point to the same type. 2+^| Capability: + | ||
*USMStorageClassesINTEL* |
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_Result Type_ and _Pointer_ must point to the same type. 2+^| Capability: + | |
*USMStorageClassesINTEL* | |
_Result Type_ and _Pointer_ must point to the same type. 1+| Capability: + | |
*USMStorageClassesINTEL* |
With this patch an accessor pointer to global buffer is moved from global space to global_device space. That is done to distinguish this pointer from those USM pointers, that are allocated global space or global_host space, in compile time. In addition to this change there are added explicit conversion operator from global_device to global space for multi_ptr class and implicit convertion for atomic class from global_device for global space. The last change isn't covered by specification published here: intel#1840 , but is required to pass atomic_api CTS. Signed-off-by: Dmitry Sidorov <[email protected]>
With this patch an accessor pointer to global buffer is moved from global space to global_device space. That is done to distinguish this pointer from those USM pointers, that are allocated global space or global_host space, in compile time. In addition to this change there are added explicit conversion operator from global_device to global space for multi_ptr class and implicit convertion for atomic class from global_device for global space. The last change isn't covered by specification published here: #1840 , but is required to pass atomic_api CTS. Signed-off-by: Dmitry Sidorov <[email protected]>
@AlexeySotkin @MrSidims Could you please approve if the change is OK with you? |
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SPIR-V part is LGTM
This extension defines two new storage classes: device and host that are subset of the cross workgroup storage class. The intention is to use them for USM pointers and non-USM accessors to provide additional information to the backends to enable optimization.