[SYCL][NativeCPU] Build libclc target-independently.

clang/lib/Basic/CMakeLists.txt

@@ -108,6 +108,7 @@ add_clang_library(clangBasic
   Targets/MSP430.cpp
   Targets/Mips.cpp
   Targets/NVPTX.cpp
+  Targets/NativeCPU.cpp
   Targets/OSTargets.cpp
   Targets/PNaCl.cpp
   Targets/PPC.cpp

clang/lib/Basic/TargetInfo.cpp

@@ -545,41 +545,6 @@ void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) {
 
   if (Opts.FakeAddressSpaceMap)
     AddrSpaceMap = &FakeAddrSpaceMap;
-
-  if ((Opts.SYCLIsDevice || Opts.OpenCL) && Opts.SYCLIsNativeCPU) {
-    // For SYCL Native CPU we use the NVPTXAddrSpaceMap because
-    // we need builtins to be mangled with AS information.
-    // This is also enabled in OpenCL mode so that mangling
-    // matches when building libclc.
-
-    static const unsigned SYCLNativeCPUASMap[] = {
-        0,  // Default
-        1,  // opencl_global
-        3,  // opencl_local
-        4,  // opencl_constant
-        0,  // opencl_private
-        0,  // opencl_generic
-        1,  // opencl_global_device
-        1,  // opencl_global_host
-        1,  // cuda_device
-        4,  // cuda_constant
-        3,  // cuda_shared
-        1,  // sycl_global
-        1,  // sycl_global_device
-        1,  // sycl_global_host
-        3,  // sycl_local
-        0,  // sycl_private
-        0,  // ptr32_sptr
-        0,  // ptr32_uptr
-        0,  // ptr64
-        0,  // hlsl_groupshared
-        0,  // hlsl_constant
-        20, // wasm_funcref
-    };
-
-    AddrSpaceMap = &SYCLNativeCPUASMap;
-    UseAddrSpaceMapMangling = true;
-  }
 }
 
 bool TargetInfo::initFeatureMap(

clang/lib/Basic/Targets.cpp

@@ -28,6 +28,7 @@
 #include "Targets/MSP430.h"
 #include "Targets/Mips.h"
 #include "Targets/NVPTX.h"
+#include "Targets/NativeCPU.h"
 #include "Targets/OSTargets.h"
 #include "Targets/PNaCl.h"
 #include "Targets/PPC.h"
@@ -117,6 +118,13 @@ std::unique_ptr<TargetInfo> AllocateTarget(const llvm::Triple &Triple,
   default:
     return nullptr;
 
+  case llvm::Triple::UnknownArch:
+    /* native_cpu is only known to Clang, not to LLVM. */
+    if (Triple.str() == "native_cpu")
+      return std::make_unique<NativeCPUTargetInfo>(Triple, Opts);
+
+    return nullptr;
+
   case llvm::Triple::arc:
     return std::make_unique<ARCTargetInfo>(Triple, Opts);
 

clang/lib/Basic/Targets/NativeCPU.cpp

@@ -0,0 +1,109 @@
+//===--- NativeCPU.cpp - Implement NativeCPU target feature support -------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements NativeCPU TargetInfo objects.
+//
+//===----------------------------------------------------------------------===//
+
+#include "NativeCPU.h"
+#include <llvm/TargetParser/Host.h>
+
+using namespace clang;
+using namespace clang::targets;
+
+static const unsigned NativeCPUASMap[] = {
+    0,  // Default
+    1,  // opencl_global
+    3,  // opencl_local
+    4,  // opencl_constant
+    0,  // opencl_private
+    0,  // opencl_generic
+    1,  // opencl_global_device
+    1,  // opencl_global_host
+    1,  // cuda_device
+    4,  // cuda_constant
+    3,  // cuda_shared
+    1,  // sycl_global
+    1,  // sycl_global_device
+    1,  // sycl_global_host
+    3,  // sycl_local
+    0,  // sycl_private
+    0,  // ptr32_sptr
+    0,  // ptr32_uptr
+    0,  // ptr64
+    0,  // hlsl_groupshared
+    0,  // hlsl_constant
+    20, // wasm_funcref
+};
+
+NativeCPUTargetInfo::NativeCPUTargetInfo(const llvm::Triple &,
+                                         const TargetOptions &Opts)
+    : TargetInfo(llvm::Triple()) {
+  AddrSpaceMap = &NativeCPUASMap;
+  UseAddrSpaceMapMangling = true;
+  HasLegalHalfType = true;
+  HasFloat16 = true;
+  resetDataLayout("e");
+
+  llvm::Triple HostTriple([&] {
+    // Take the default target triple if no other host triple is specified so
+    // that system headers work.
+    if (Opts.HostTriple.empty())
+      return llvm::sys::getDefaultTargetTriple();
+
+    return Opts.HostTriple;
+  }());
+  if (HostTriple.getArch() != llvm::Triple::UnknownArch) {
+    HostTarget = AllocateTarget(HostTriple, Opts);
+
+    // Copy properties from host target.
+    BoolWidth = HostTarget->getBoolWidth();
+    BoolAlign = HostTarget->getBoolAlign();
+    IntWidth = HostTarget->getIntWidth();
+    IntAlign = HostTarget->getIntAlign();
+    HalfWidth = HostTarget->getHalfWidth();
+    HalfAlign = HostTarget->getHalfAlign();
+    FloatWidth = HostTarget->getFloatWidth();
+    FloatAlign = HostTarget->getFloatAlign();
+    DoubleWidth = HostTarget->getDoubleWidth();
+    DoubleAlign = HostTarget->getDoubleAlign();
+    LongWidth = HostTarget->getLongWidth();
+    LongAlign = HostTarget->getLongAlign();
+    LongLongWidth = HostTarget->getLongLongWidth();
+    LongLongAlign = HostTarget->getLongLongAlign();
+    PointerWidth = HostTarget->getPointerWidth(LangAS::Default);
+    PointerAlign = HostTarget->getPointerAlign(LangAS::Default);
+    MinGlobalAlign = HostTarget->getMinGlobalAlign(/* TypeSize = */ 0,
+                                                   /* HasNonWeakDef = */ true);
+    NewAlign = HostTarget->getNewAlign();
+    DefaultAlignForAttributeAligned =
+        HostTarget->getDefaultAlignForAttributeAligned();
+    SizeType = HostTarget->getSizeType();
+    PtrDiffType = HostTarget->getPtrDiffType(LangAS::Default);
+    IntMaxType = HostTarget->getIntMaxType();
+    WCharType = HostTarget->getWCharType();
+    WIntType = HostTarget->getWIntType();
+    Char16Type = HostTarget->getChar16Type();
+    Char32Type = HostTarget->getChar32Type();
+    Int64Type = HostTarget->getInt64Type();
+    SigAtomicType = HostTarget->getSigAtomicType();
+    ProcessIDType = HostTarget->getProcessIDType();
+
+    UseBitFieldTypeAlignment = HostTarget->useBitFieldTypeAlignment();
+    UseZeroLengthBitfieldAlignment =
+        HostTarget->useZeroLengthBitfieldAlignment();
+    UseExplicitBitFieldAlignment = HostTarget->useExplicitBitFieldAlignment();
+    ZeroLengthBitfieldBoundary = HostTarget->getZeroLengthBitfieldBoundary();
+
+    // This is a bit of a lie, but it controls __GCC_ATOMIC_XXX_LOCK_FREE, and
+    // we need those macros to be identical on host and device, because (among
+    // other things) they affect which standard library classes are defined,
+    // and we need all classes to be defined on both the host and device.
+    MaxAtomicInlineWidth = HostTarget->getMaxAtomicInlineWidth();
+  }
+}

clang/lib/Basic/Targets/NativeCPU.h

@@ -0,0 +1,70 @@
+//===--- NativeCPU.h - Declare NativeCPU target feature support -*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares NativeCPU TargetInfo objects.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_NATIVECPU_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_NATIVECPU_H
+
+#include "Targets.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY NativeCPUTargetInfo final : public TargetInfo {
+  std::unique_ptr<TargetInfo> HostTarget;
+
+public:
+  NativeCPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
+
+  void getTargetDefines(const LangOptions &Opts,
+                        MacroBuilder &Builder) const override {
+    DefineStd(Builder, "NativeCPU", Opts);
+  }
+
+  ArrayRef<Builtin::Info> getTargetBuiltins() const override { return {}; }
+
+  BuiltinVaListKind getBuiltinVaListKind() const override {
+    if (HostTarget)
+      return HostTarget->getBuiltinVaListKind();
+
+    return TargetInfo::VoidPtrBuiltinVaList;
+  }
+
+  bool validateAsmConstraint(const char *&Name,
+                             TargetInfo::ConstraintInfo &info) const override {
+    return true;
+  }
+
+  std::string_view getClobbers() const override { return ""; }
+
+  void setSupportedOpenCLOpts() override { supportAllOpenCLOpts(); }
+
+  CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
+    if (HostTarget)
+      return HostTarget->checkCallingConvention(CC);
+
+    return TargetInfo::checkCallingConvention(CC);
+  }
+
+protected:
+  ArrayRef<const char *> getGCCRegNames() const override { return {}; }
+
+  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+    return {};
+  }
+
+  bool hasBitIntType() const override { return true; }
+};
+
+} // namespace targets
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_BASIC_TARGETS_NATIVECPU_H

clang/lib/Driver/Driver.cpp

@@ -891,6 +891,10 @@ static bool isValidSYCLTriple(llvm::Triple T) {
       !T.hasEnvironment())
     return true;
 
+  // 'native_cpu' is valid for Native CPU.
+  if (isSYCLNativeCPU(T))
+    return true;
+
   // Check for invalid SYCL device triple values.
   // Non-SPIR/SPIRV arch.
   if (!T.isSPIROrSPIRV())
@@ -1354,12 +1358,6 @@ void Driver::CreateOffloadingDeviceToolChains(Compilation &C,
             }
             Arch = Device->data();
             UserTargetName = "amdgcn-amd-amdhsa";
-          } else if (Val == "native_cpu") {
-            const ToolChain *HostTC =
-                C.getSingleOffloadToolChain<Action::OFK_Host>();
-            llvm::Triple HostTriple = HostTC->getTriple();
-            SYCLTriples.insert(HostTriple.normalize());
-            continue;
           }
 
           llvm::Triple DeviceTriple(getSYCLDeviceTriple(UserTargetName));
@@ -5629,9 +5627,7 @@ class OffloadingActionBuilder final {
       auto IsAMDGCN = TargetTriple.isAMDGCN();
       auto IsSPIR = TargetTriple.isSPIROrSPIRV();
       bool IsSpirvAOT = TargetTriple.isSPIRAOT();
-      const bool IsSYCLNativeCPU =
-          TC->getAuxTriple() &&
-          driver::isSYCLNativeCPU(TargetTriple, *TC->getAuxTriple());
+      bool IsSYCLNativeCPU = isSYCLNativeCPU(TargetTriple);
       for (const auto &Input : ListIndex) {
         if (TargetTriple.getSubArch() == llvm::Triple::SPIRSubArch_fpga &&
             types::isFPGA(Input->getType())) {
@@ -6695,12 +6691,6 @@ class OffloadingActionBuilder final {
                   C.getDriver().getSYCLDeviceTriple("amdgcn-amd-amdhsa"),
                   ValidDevice->data());
               UserTargetName = "amdgcn-amd-amdhsa";
-            } else if (Val == "native_cpu") {
-              const ToolChain *HostTC =
-                  C.getSingleOffloadToolChain<Action::OFK_Host>();
-              llvm::Triple TT = HostTC->getTriple();
-              SYCLTripleList.push_back(TT);
-              continue;
             }
 
             llvm::Triple TT(
@@ -7239,10 +7229,6 @@ class OffloadingActionBuilder final {
   /// Offload deps output is then forwarded to active device action builders so
   /// they can add it to the device linker inputs.
   void addDeviceLinkDependenciesFromHost(ActionList &LinkerInputs) {
-    if (isSYCLNativeCPU(C.getArgs())) {
-      // SYCL Native CPU doesn't need deps from clang-offload-deps.
-      return;
-    }
     // Link image for reading dependencies from it.
     auto *LA = C.MakeAction<LinkJobAction>(LinkerInputs,
                                            types::TY_Host_Dependencies_Image);
@@ -9614,9 +9600,7 @@ InputInfoList Driver::BuildJobsForActionNoCache(
       Action::OffloadKind DependentOffloadKind;
       if (UI.DependentOffloadKind == Action::OFK_SYCL &&
           TargetDeviceOffloadKind == Action::OFK_None &&
-          !(isSYCLNativeCPU(Args) &&
-            isSYCLNativeCPU(C.getDefaultToolChain().getTriple(),
-                            TC->getTriple()) &&
+          !(isSYCLNativeCPU(C.getDefaultToolChain().getTriple()) &&
             UA->getDependentActionsInfo().size() > 1))
         DependentOffloadKind = Action::OFK_Host;
       else
@@ -10675,7 +10659,7 @@ const ToolChain &Driver::getOffloadingDeviceToolChain(
             *this, Target, HostTC, Args, TargetDeviceOffloadKind);
         break;
       default:
-        if (isSYCLNativeCPU(Args)) {
+        if (isSYCLNativeCPU(Target)) {
           TC = std::make_unique<toolchains::SYCLToolChain>(*this, Target,
                                                            HostTC, Args);
         }

clang/lib/Driver/OffloadBundler.cpp

@@ -142,7 +142,8 @@ bool OffloadTargetInfo::isOffloadKindCompatible(
 }
 
 bool OffloadTargetInfo::isTripleValid() const {
-  return !Triple.str().empty() && Triple.getArch() != Triple::UnknownArch;
+  return !Triple.str().empty() && (Triple.getArch() != Triple::UnknownArch ||
+                                   Triple.str() == "native_cpu");
 }
 
 bool OffloadTargetInfo::operator==(const OffloadTargetInfo &Target) const {