[TableGen] const-correct a couple CodeGenSchedule methods. NFC

intel · Jan 18, 2025 · c3aa86c · c3aa86c
1 parent d79e3af
commit c3aa86c
Show file tree

Hide file tree

Showing 2 changed files with 5 additions and 5 deletions.
diff --git a/llvm/utils/TableGen/Common/CodeGenSchedule.cpp b/llvm/utils/TableGen/Common/CodeGenSchedule.cpp
@@ -1740,8 +1740,8 @@ void CodeGenSchedModels::inferFromRW(ArrayRef<unsigned> OperWrites,
 
 // Check if any processor resource group contains all resource records in
 // SubUnits.
-bool CodeGenSchedModels::hasSuperGroup(ConstRecVec &SubUnits,
-                                       CodeGenProcModel &PM) {
+bool CodeGenSchedModels::hasSuperGroup(const ConstRecVec &SubUnits,
+                                       const CodeGenProcModel &PM) {
   for (const Record *ProcResourceDef : PM.ProcResourceDefs) {
     if (!ProcResourceDef->isSubClassOf("ProcResGroup"))
       continue;
@@ -1759,7 +1759,7 @@ bool CodeGenSchedModels::hasSuperGroup(ConstRecVec &SubUnits,
 }
 
 // Verify that overlapping groups have a common supergroup.
-void CodeGenSchedModels::verifyProcResourceGroups(CodeGenProcModel &PM) {
+void CodeGenSchedModels::verifyProcResourceGroups(const CodeGenProcModel &PM) {
   for (unsigned i = 0, e = PM.ProcResourceDefs.size(); i < e; ++i) {
     if (!PM.ProcResourceDefs[i]->isSubClassOf("ProcResGroup"))
       continue;

diff --git a/llvm/utils/TableGen/Common/CodeGenSchedule.h b/llvm/utils/TableGen/Common/CodeGenSchedule.h
@@ -630,8 +630,8 @@ class CodeGenSchedModels {
   void inferFromItinClass(const Record *ItinClassDef, unsigned FromClassIdx);
   void inferFromInstRWs(unsigned SCIdx);
 
-  bool hasSuperGroup(ConstRecVec &SubUnits, CodeGenProcModel &PM);
-  void verifyProcResourceGroups(CodeGenProcModel &PM);
+  bool hasSuperGroup(const ConstRecVec &SubUnits, const CodeGenProcModel &PM);
+  void verifyProcResourceGroups(const CodeGenProcModel &PM);
 
   void collectProcResources();