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drivers/media/i2c/imx390_mode_1920x1200HDR3_CUST_PWL12.h
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// SPDX-License-Identifier: GPL-2.0 | ||
// Copyright (C) 2020 Intel Corporation | ||
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#include <linux/device.h> | ||
#include <linux/gpio.h> | ||
#include <linux/module.h> | ||
#include <linux/slab.h> | ||
#include <linux/wait.h> | ||
#include <linux/delay.h> | ||
#include <linux/platform_device.h> | ||
#include <linux/version.h> | ||
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#include <media/media-device.h> | ||
#include <media/media-entity.h> | ||
#include <media/ti960.h> | ||
#include <media/v4l2-device.h> | ||
#include <media/videobuf2-core.h> | ||
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#include "ti960-reg.h" | ||
#include "ti953.h" | ||
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int ti953_reg_write(struct v4l2_subdev *sd, unsigned short rx_port, | ||
unsigned short ser_alias, unsigned char reg, unsigned char val) | ||
{ | ||
int ret; | ||
int retry, timeout = 10; | ||
struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
unsigned short addr_backup; | ||
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dev_dbg(sd->dev, "%s port %d, ser_alias %x, reg %x, val %x", | ||
__func__, rx_port, ser_alias, reg, val); | ||
addr_backup = client->addr; | ||
client->addr = ser_alias; | ||
for (retry = 0; retry < timeout; retry++) { | ||
ret = i2c_smbus_write_byte_data(client, reg, val); | ||
if (ret < 0) | ||
usleep_range(5000, 6000); | ||
else | ||
break; | ||
} | ||
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client->addr = addr_backup; | ||
if (retry >= timeout) { | ||
dev_err(sd->dev, | ||
"%s:write reg failed: port=%2x, addr=%2x, reg=%2x\n", | ||
__func__, rx_port, ser_alias, reg); | ||
return -EREMOTEIO; | ||
} | ||
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return 0; | ||
} | ||
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int ti953_reg_read(struct v4l2_subdev *sd, unsigned short rx_port, | ||
unsigned short ser_alias, unsigned char reg, unsigned char *val) | ||
{ | ||
int ret, retry, timeout = 10; | ||
struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
unsigned short addr_backup; | ||
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addr_backup = client->addr; | ||
client->addr = ser_alias; | ||
for (retry = 0; retry < timeout; retry++) { | ||
ret = i2c_smbus_read_byte_data(client, reg); | ||
if (ret < 0) | ||
usleep_range(5000, 6000); | ||
else { | ||
*val = ret & 0xFF; | ||
break; | ||
} | ||
} | ||
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client->addr = addr_backup; | ||
if (retry >= timeout) { | ||
dev_err(sd->dev, | ||
"%s:read reg failed: port=%2x, addr=%2x, reg=%2x\n", | ||
__func__, rx_port, ser_alias, reg); | ||
return -EREMOTEIO; | ||
} | ||
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return 0; | ||
} | ||
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bool ti953_detect(struct v4l2_subdev *sd, unsigned short rx_port, unsigned short ser_alias) | ||
{ | ||
bool ret = false; | ||
int i; | ||
int rval; | ||
unsigned char val; | ||
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for (i = 0; i < ARRAY_SIZE(ti953_FPD3_RX_ID); i++) { | ||
rval = ti953_reg_read(sd, rx_port, ser_alias, | ||
ti953_FPD3_RX_ID[i].reg, &val); | ||
if (rval) { | ||
dev_err(sd->dev, "port %d, ti953 write timeout %d\n", rx_port, rval); | ||
break; | ||
} | ||
if (val != ti953_FPD3_RX_ID[i].val_expected) | ||
break; | ||
} | ||
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if (i == ARRAY_SIZE(ti953_FPD3_RX_ID)) | ||
ret = true; | ||
else | ||
dev_err(sd->dev, "TI953 Probe Failed"); | ||
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return ret; | ||
} | ||
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int ti953_init(struct v4l2_subdev *sd, unsigned short rx_port, unsigned short ser_alias) | ||
{ | ||
int i, rval; | ||
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for (i = 0; i < ARRAY_SIZE(ti953_init_settings); i++) { | ||
rval = ti953_reg_write(sd, rx_port, ser_alias, | ||
ti953_init_settings[i].reg, | ||
ti953_init_settings[i].val); | ||
if (rval) { | ||
dev_err(sd->dev, "port %d, ti953 write timeout %d\n", 0, rval); | ||
break; | ||
} | ||
} | ||
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ti953_init_clk(sd, rx_port, ser_alias); | ||
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return 0; | ||
} | ||
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int ti953_init_clk(struct v4l2_subdev *sd, unsigned short rx_port, unsigned short ser_alias) | ||
{ | ||
int i, rval; | ||
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for (i = 0; i < ARRAY_SIZE(ti953_init_settings_clk); i++) { | ||
rval = ti953_reg_write(sd, rx_port, ser_alias, | ||
ti953_init_settings_clk[i].reg, | ||
ti953_init_settings_clk[i].val); | ||
if (rval) { | ||
dev_err(sd->dev, "port %d, ti953 write timeout %d\n", 0, rval); | ||
break; | ||
} | ||
} | ||
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return 0; | ||
} | ||
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int32_t ti953_bus_speed(struct v4l2_subdev *sd, uint16_t rx_port, uint16_t ser_alias, uint8_t i2c_speed) | ||
{ | ||
struct ti953_register_write scl_high_reg; | ||
struct ti953_register_write scl_low_reg; | ||
int32_t ret = 0; | ||
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scl_high_reg.reg = TI953_SCL_HIGH_TIME; | ||
scl_low_reg.reg = TI953_SCL_LOW_TIME; | ||
switch (i2c_speed) { | ||
case TI953_I2C_SPEED_STANDARD: | ||
scl_high_reg.val = TI953_I2C_SCL_HIGH_TIME_STANDARD; | ||
scl_low_reg.val = TI953_I2C_SCL_LOW_TIME_STANDARD; | ||
break; | ||
case TI953_I2C_SPEED_FAST: | ||
scl_high_reg.val = TI953_I2C_SCL_HIGH_TIME_FAST; | ||
scl_low_reg.val = TI953_I2C_SCL_LOW_TIME_FAST; | ||
break; | ||
case TI953_I2C_SPEED_FAST_PLUS: | ||
scl_high_reg.val = TI953_I2C_SCL_HIGH_TIME_FAST_PLUS; | ||
scl_low_reg.val = TI953_I2C_SCL_LOW_TIME_FAST_PLUS; | ||
break; | ||
case TI953_I2C_SPEED_HIGH: | ||
default: | ||
dev_err(sd->dev, "port %u, ti953 unsupported I2C speed mode %u", | ||
rx_port, i2c_speed); | ||
scl_high_reg.val = TI953_I2C_SCL_HIGH_TIME_STANDARD; | ||
scl_low_reg.val = TI953_I2C_SCL_LOW_TIME_STANDARD; | ||
ret = -EINVAL; | ||
break; | ||
} | ||
if (ret != 0) | ||
return ret; | ||
ret = ti953_reg_write(sd, rx_port, ser_alias, | ||
scl_high_reg.reg, scl_high_reg.val); | ||
if (ret != 0) { | ||
dev_err(sd->dev, "port %u, ti953 write SCL_HIGH_TIME failed %d", | ||
rx_port, ret); | ||
return ret; | ||
} | ||
ret = ti953_reg_write(sd, rx_port, ser_alias, | ||
scl_low_reg.reg, scl_low_reg.val); | ||
if (ret != 0) { | ||
dev_err(sd->dev, "port %u, ti953 write SCL_LOW_TIME failed %d", | ||
rx_port, ret); | ||
return ret; | ||
} | ||
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return 0; | ||
} |
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/* SPDX-License-Identifier: GPL-2.0 */ | ||
/* Copyright (C) 2020 Intel Corporation */ | ||
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#ifndef TI953_H | ||
#define TI953_H | ||
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struct ti953_register_write { | ||
u8 reg; | ||
u8 val; | ||
}; | ||
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struct ti953_register_devid { | ||
u8 reg; | ||
u8 val_expected; | ||
}; | ||
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/* register definition */ | ||
#define TI953_RESET_CTL 0x1 | ||
#define TI953_GENERAL_CFG 0x2 | ||
#define TI953_LOCAL_GPIO_DATA 0xd | ||
#define TI953_GPIO_INPUT_CTRL 0xe | ||
#define TI953_SCL_HIGH_TIME 0xbU | ||
#define TI953_SCL_LOW_TIME 0xcU | ||
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/* register value definition */ | ||
#define TI953_DIGITAL_RESET_1 0x2 | ||
#define TI953_GPIO0_RMTEN 0x10 | ||
#define TI953_GPIO0_OUT 0x1 | ||
#define TI953_GPIO1_OUT (0x1 << 1) | ||
#define TI953_GPIO_OUT_EN 0xf0 | ||
#define TI953_I2C_SCL_HIGH_TIME_STANDARD 0x7F | ||
#define TI953_I2C_SCL_LOW_TIME_STANDARD 0x7F | ||
#define TI953_I2C_SCL_HIGH_TIME_FAST 0x13 | ||
#define TI953_I2C_SCL_LOW_TIME_FAST 0x26 | ||
#define TI953_I2C_SCL_HIGH_TIME_FAST_PLUS 0x06 | ||
#define TI953_I2C_SCL_LOW_TIME_FAST_PLUS 0x0b | ||
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#define TI953_I2C_SPEED_STANDARD 0x1U | ||
#define TI953_I2C_SPEED_FAST 0x2U | ||
#define TI953_I2C_SPEED_HIGH 0x3U | ||
#define TI953_I2C_SPEED_FAST_PLUS 0x4U | ||
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/* | ||
* TI953_GENERAL_CFG: | ||
* bit 0: I2C Strap Mode: I2C Voltage level | ||
* bit 1: CRC_TX_GEN_ENABLE: Transmitter CRC Generator | ||
* bit 4 - 5: | ||
* CSI-2 Data lane configuration. | ||
* 00: 1-lane configuration | ||
* 01: 2-lane configuration | ||
* 11: 4-lane configuration | ||
* bit 6: | ||
* CONTS_CLK: | ||
* CSI-2 Clock Lane Configuration. | ||
* 0 : Non Continuous Clock | ||
* 1 : Continuous Clock | ||
*/ | ||
#define TI953_CONTS_CLK 0x40 | ||
#define TI953_CSI_1LANE 0x00 | ||
#define TI953_CSI_2LANE 0x10 | ||
#define TI953_CSI_4LANE 0x30 | ||
#define TI953_CSI_LANE_MASK ~(0x30) | ||
#define TI953_CRC_TX_GEN_ENABLE 0x2 | ||
#define TI953_I2C_STRAP_MODE 0x1 | ||
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static const struct ti953_register_write ti953_init_settings[] = { | ||
{0x4c, 0x01}, /* ox03a10 init sequence */ | ||
{0xb0, 0x04}, | ||
{0xb1, 0x03}, | ||
{0xb2, 0x25}, | ||
{0xb1, 0x13}, | ||
{0xb2, 0x25}, | ||
{0xb0, 0x04}, | ||
{0xb1, 0x04}, | ||
{0xb2, 0x30}, | ||
{0xb1, 0x14}, | ||
{0xb2, 0x30}, | ||
{0xb0, 0x04}, | ||
{0xb1, 0x06}, | ||
{0xb2, 0x40}, | ||
{0x42, 0x01}, | ||
{0x41, 0x93}, | ||
{0x4c, 0x12}, | ||
{0xb0, 0x08}, | ||
{0xb1, 0x03}, | ||
{0xb2, 0x25}, | ||
{0xb1, 0x13}, | ||
{0xb2, 0x25}, | ||
{0xb0, 0x08}, | ||
{0xb1, 0x04}, | ||
{0xb2, 0x30}, | ||
{0xb1, 0x14}, | ||
{0xb2, 0x30}, | ||
{0xb0, 0x08}, | ||
{0xb1, 0x06}, | ||
{0xb2, 0x40}, | ||
{0x42, 0x01}, | ||
{0x41, 0x93}, | ||
{0x4c, 0x24}, | ||
{0xb0, 0x0c}, | ||
{0xb1, 0x03}, | ||
{0xb2, 0x25}, | ||
{0xb1, 0x13}, | ||
{0xb2, 0x25}, | ||
{0xb0, 0x0c}, | ||
{0xb1, 0x04}, | ||
{0xb2, 0x30}, | ||
{0xb1, 0x14}, | ||
{0xb2, 0x30}, | ||
{0xb0, 0x0c}, | ||
{0xb1, 0x06}, | ||
{0xb2, 0x40}, | ||
{0x42, 0x01}, | ||
{0x41, 0x93}, | ||
{0x4c, 0x38}, | ||
{0xb0, 0x10}, | ||
{0xb1, 0x03}, | ||
{0xb2, 0x25}, | ||
{0xb1, 0x13}, | ||
{0xb2, 0x25}, | ||
{0xb0, 0x10}, | ||
{0xb1, 0x04}, | ||
{0xb2, 0x30}, | ||
{0xb1, 0x14}, | ||
{0xb2, 0x30}, | ||
{0xb0, 0x10}, | ||
{0xb1, 0x06}, | ||
{0xb2, 0x40}, | ||
{0x42, 0x01}, | ||
{0x41, 0x93}, | ||
}; | ||
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static const struct ti953_register_write ti953_init_settings_clk[] = { | ||
{0x06, 0x41}, | ||
/* WA: set N to 0x25 for 30 fps */ | ||
{0x07, 0x25}, | ||
}; | ||
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static const struct ti953_register_devid ti953_FPD3_RX_ID[] = { | ||
{0xf0, 0x5f}, | ||
{0xf1, 0x55}, | ||
{0xf2, 0x42}, | ||
{0xf3, 0x39}, | ||
{0xf4, 0x35}, | ||
{0xf5, 0x33}, | ||
}; | ||
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int ti953_reg_write(struct v4l2_subdev *sd, unsigned short rx_port, | ||
unsigned short ser_alias, unsigned char reg, unsigned char val); | ||
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int ti953_reg_read(struct v4l2_subdev *sd, unsigned short rx_port, | ||
unsigned short ser_alias, unsigned char reg, unsigned char *val); | ||
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bool ti953_detect(struct v4l2_subdev *sd, unsigned short rx_port, unsigned short ser_alias); | ||
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int ti953_init(struct v4l2_subdev *sd, unsigned short rx_port, unsigned short ser_alias); | ||
int ti953_init_clk(struct v4l2_subdev *sd, unsigned short rx_port, unsigned short ser_alias); | ||
int32_t ti953_bus_speed(struct v4l2_subdev *sd, uint16_t rx_port, uint16_t ser_alias, uint8_t i2c_speed); | ||
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#endif |
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