[Autobackout][FunctionalRegression]Revert of change: 65f49f8: Enable …

…internal LSC typed 2D intrinsics

.

IGC/VectorCompiler/include/vc/InternalIntrinsics/Intrinsic_definitions.py

@@ -839,41 +839,6 @@
                                  ],
                                  "attributes" : "WriteMem", },
 
-## ``llvm.vc.internal.lsc.*2d.typed.bti.*`` : LSC typed 2d block intrinsics
-## ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-## * arg0: vNi8, Cache controls, where N is the number of supported cache levels [MBC]
-## * arg1: i32, Surface
-## * arg2: i32, Block height [MBC]
-## * arg3: i32, Block width (in elements) [MBC]
-## * arg4: i32, Memory block X position (in bytes)
-## * arg5: i32, Memory block Y position
-## * arg6: data to write (store only)
-##
-## * Return value: the value read or void
-##
-    "lsc_load_2d_tgm_bti" : { "result" : "anyvector",
-                              "arguments" : [
-                                  "anyvector", # cache controls
-                                  "int",       # i32 BTI
-                                  "int",       # block height
-                                  "int",       # block width
-                                  "int",       # X offset
-                                  "int"        # Y offset
-                                 ],
-                              "attributes" : "ReadMem", },
-    "lsc_store_2d_tgm_bti" : { "result" : "void",
-                               "arguments" : [
-                                  "anyvector", # cache controls
-                                  "int",       # i32 BTI
-                                  "int",       # block height
-                                  "int",       # block width
-                                  "int",       # X offset
-                                  "int",       # Y offset
-                                  "anyvector"
-                                 ],
-                               "attributes" : "WriteMem", },
-
-
 ## ``llvm.vc.internal.lsc.*.quad.tgm`` : Typed LSC load intrinsic
 ## ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 ## * arg0: vNi1 Predicate (overloaded)

IGC/VectorCompiler/lib/GenXCodeGen/GenXCisaBuilder.cpp

@@ -3826,7 +3826,7 @@ void GenXKernelBuilder::buildIntrinsic(CallInst *CI, unsigned IntrinID,
     // work around VISA spec pecularity: for typed messages width is in bytes
     // not in elements
     VectorType *VT;
-    constexpr int SrcOperandNum = 6; // to be in sync with json
+    constexpr int SrcOperandNum = 7; // to be in sync with json
     switch (SubOpcode) {
     case LSC_LOAD_BLOCK2D:
       VT = cast<VectorType>(CI->getType());

IGC/VectorCompiler/lib/GenXCodeGen/GenXLegacyToLscTranslator.cpp

@@ -810,8 +810,8 @@ Value *GenXLegacyToLscTranslator::translateMediaLoadStore(CallInst &CI) const {
   IGC_ASSERT(IID == GenXIntrinsic::genx_media_ld ||
              IID == GenXIntrinsic::genx_media_st);
   auto IsLoad = IID == GenXIntrinsic::genx_media_ld;
-  auto NewIID = IsLoad ? vc::InternalIntrinsic::lsc_load_2d_tgm_bti
-                       : vc::InternalIntrinsic::lsc_store_2d_tgm_bti;
+  auto NewIID = IsLoad ? GenXIntrinsic::genx_lsc_load2d_typed_bti
+                       : GenXIntrinsic::genx_lsc_store2d_typed_bti;
 
   auto *Modifier = cast<ConstantInt>(CI.getArgOperand(0));
   auto *BTI = CI.getArgOperand(1);
@@ -853,18 +853,9 @@ Value *GenXLegacyToLscTranslator::translateMediaLoadStore(CallInst &CI) const {
   IGC_ASSERT(Width % ESize == 0);
   IGC_ASSERT(DataSize % RoundedWidth == 0);
 
-  auto *CacheOpts = ConstantDataVector::getSplat(
-      ST->getNumCacheLevels(), Builder.getInt8(LSC_CACHING_DEFAULT));
-
-  SmallVector<Type *, 2> Types;
-  if (IsLoad)
-    Types.push_back(VTy);
-  Types.push_back(CacheOpts->getType());
-  if (!IsLoad)
-    Types.push_back(VTy);
-
   SmallVector<Value *, 8> Args = {
-      CacheOpts,
+      Builder.getInt8(0), // L1 cache control (default)
+      Builder.getInt8(0), // L3 cache control (default)
       BTI,
       Builder.getInt32(Height),
       Builder.getInt32(Width / ESize),
@@ -874,8 +865,7 @@ Value *GenXLegacyToLscTranslator::translateMediaLoadStore(CallInst &CI) const {
   if (!IsLoad)
     Args.push_back(Data);
 
-  auto *Func = vc::InternalIntrinsic::getInternalDeclaration(CI.getModule(),
-                                                             NewIID, Types);
+  auto *Func = GenXIntrinsic::getGenXDeclaration(CI.getModule(), NewIID, {VTy});
   auto *I = Builder.CreateCall(Func, Args);
   LLVM_DEBUG(dbgs() << "New intrinsic generated: " << *I);
   return I;

IGC/VectorCompiler/lib/GenXCodeGen/GenXLowering.cpp

@@ -1795,19 +1795,19 @@ bool GenXLowering::widenSIMD8GatherScatter(CallInst *CI, unsigned IID) {
  * lowerLSCTyped2DBlock : handle padding for the typed 2d block messages
  */
 bool GenXLowering::lowerLSCTyped2DBlock(CallInst *CI, unsigned IID) {
-  IGC_ASSERT(IID == vc::InternalIntrinsic::lsc_load_2d_tgm_bti ||
-             IID == vc::InternalIntrinsic::lsc_store_2d_tgm_bti);
-
-  auto *CacheOpts = CI->getOperand(0);
-  auto *BTIV = CI->getOperand(1);
-  auto *HeightV = cast<ConstantInt>(CI->getOperand(2));
-  auto *WidthV = cast<ConstantInt>(CI->getOperand(3));
-  auto *XOffV = CI->getOperand(4);
-  auto *YOffV = CI->getOperand(5);
+  IGC_ASSERT(IID == GenXIntrinsic::genx_lsc_load2d_typed_bti ||
+             IID == GenXIntrinsic::genx_lsc_store2d_typed_bti);
+
+  auto *L1V = CI->getOperand(0);
+  auto *L3V = CI->getOperand(1);
+  auto *BTIV = CI->getOperand(2);
+  auto *HeightV = cast<ConstantInt>(CI->getOperand(3));
+  auto *WidthV = cast<ConstantInt>(CI->getOperand(4));
+  auto *XOffV = CI->getOperand(5);
+  auto *YOffV = CI->getOperand(6);
   Value *StoreDataV = nullptr;
-  bool IsStore = IID == vc::InternalIntrinsic::lsc_store_2d_tgm_bti;
-  if (IsStore)
-    StoreDataV = CI->getOperand(6);
+  if (IID == GenXIntrinsic::genx_lsc_store2d_typed_bti)
+    StoreDataV = CI->getOperand(7);
 
   auto *DataTy = StoreDataV ? StoreDataV->getType() : CI->getType();
   auto *VTy = cast<IGCLLVM::FixedVectorType>(DataTy);
@@ -1838,15 +1838,9 @@ bool GenXLowering::lowerLSCTyped2DBlock(CallInst *CI, unsigned IID) {
     return false;
 
   auto *TargetVTy = IGCLLVM::FixedVectorType::get(ElementTy, TargetElements);
-
-  SmallVector<Type *, 2> Types;
-  if (!IsStore)
-    Types.push_back(TargetVTy);
-  Types.push_back(CacheOpts->getType());
-  if (IsStore)
-    Types.push_back(TargetVTy);
-
-  auto *Decl = vc::getAnyDeclaration(CI->getModule(), IID, Types);
+  auto IntrinsicID = static_cast<GenXIntrinsic::ID>(IID);
+  auto *Decl = GenXIntrinsic::getGenXDeclaration(CI->getModule(), IntrinsicID,
+                                                 {TargetVTy});
 
   vc::CMRegion R(ElementTy);
   R.NumElements = NElements;
@@ -1861,11 +1855,11 @@ bool GenXLowering::lowerLSCTyped2DBlock(CallInst *CI, unsigned IID) {
     R.VStride = 0;
   }
 
-  SmallVector<Value *, 7> Args = {CacheOpts, BTIV,  HeightV,
-                                  WidthV,    XOffV, YOffV};
+  SmallVector<Value *, 8> Args = {L1V,    L3V,   BTIV, HeightV,
+                                  WidthV, XOffV, YOffV};
 
   switch (IID) {
-  case vc::InternalIntrinsic::lsc_load_2d_tgm_bti: {
+  case GenXIntrinsic::genx_lsc_load2d_typed_bti: {
     auto *NewLoad = CallInst::Create(
         Decl, Args, CI->getName() + VALUE_NAME(".padding"), CI);
     NewLoad->setDebugLoc(CI->getDebugLoc());
@@ -1874,7 +1868,7 @@ bool GenXLowering::lowerLSCTyped2DBlock(CallInst *CI, unsigned IID) {
                          CI->getDebugLoc());
     CI->replaceAllUsesWith(RdRgn);
   } break;
-  case vc::InternalIntrinsic::lsc_store_2d_tgm_bti: {
+  case GenXIntrinsic::genx_lsc_store2d_typed_bti: {
     IGC_ASSERT_EXIT(StoreDataV);
     auto *WrRgn = R.createWrRegion(UndefValue::get(TargetVTy), StoreDataV,
                                    StoreDataV->getName() + ".wrregion", CI,
@@ -2065,8 +2059,8 @@ bool GenXLowering::processInst(Instruction *Inst) {
       ToErase.push_back(Inst);
       return true;
     }
-    case vc::InternalIntrinsic::lsc_load_2d_tgm_bti:
-    case vc::InternalIntrinsic::lsc_store_2d_tgm_bti:
+    case GenXIntrinsic::genx_lsc_load2d_typed_bti:
+    case GenXIntrinsic::genx_lsc_store2d_typed_bti:
       return lowerLSCTyped2DBlock(CI, IntrinsicID);
     case GenXIntrinsic::genx_ssmul:
     case GenXIntrinsic::genx_sumul:

IGC/VectorCompiler/lib/GenXCodeGen/Utils/cisa_gen_intrinsics.json

@@ -882,34 +882,6 @@
       "OffsetY": ["INT", 8],
       "Src": ["RAW", 9]
     },
-    "vc::InternalIntrinsic::lsc_load_2d_tgm_bti" : {
-      "opc": "ISA_LSC_TYPED",
-      "gen_opc": "ISA_LSC_TYPED_2D",
-      "sub_opc": [ "LITERAL", "LSC_LOAD_BLOCK2D" ],
-      "address_model": [ "LITERAL", "LSC_ADDR_TYPE_BTI" ],
-      "Dst": [ "RAW", 0 ],
-      "CacheOpts": ["CACHEOPTS", 1],
-      "Surface": [ "GENERAL", "UNSIGNED", 2 ],
-      "BlockHeight": [ "INT", 3 ],
-      "BlockWidth": [ "INT", 4 ],
-      "XOff": [ "GENERAL", "UNSIGNED", 5 ],
-      "YOff": [ "GENERAL", "UNSIGNED", 6 ],
-      "Src": [ "NULLRAW" ]
-    },
-    "vc::InternalIntrinsic::lsc_store_2d_tgm_bti" : {
-      "opc": "ISA_LSC_TYPED",
-      "gen_opc": "ISA_LSC_TYPED_2D",
-      "sub_opc": [ "LITERAL", "LSC_STORE_BLOCK2D" ],
-      "address_model": [ "LITERAL", "LSC_ADDR_TYPE_BTI" ],
-      "Dst": [ "NULLRAW" ],
-      "CacheOpts": ["CACHEOPTS", 1],
-      "Surface": [ "GENERAL", "UNSIGNED", 2 ],
-      "BlockHeight": [ "INT", 3 ],
-      "BlockWidth": [ "INT", 4 ],
-      "XOff": [ "GENERAL", "UNSIGNED", 5 ],
-      "YOff": [ "GENERAL", "UNSIGNED", 6 ],
-      "Src": [ "RAW", 7 ]
-    },
     // vc-intrinsics
     "genx_fptosi_sat": {
       "opc": "ISA_MOV",
@@ -3846,6 +3818,36 @@
       "barrier_id": [ "GENERAL", 2 ],
       "thread_count": [ "GENERAL", 3 ]
     },
+    "genx_lsc_load2d_typed_bti" : {
+      "opc": "ISA_LSC_TYPED",
+      "gen_opc": "ISA_LSC_TYPED_2D",
+      "sub_opc": [ "LITERAL", "LSC_LOAD_BLOCK2D" ],
+      "address_model": [ "LITERAL", "LSC_ADDR_TYPE_BTI" ],
+      "Dst": [ "RAW", 0 ],
+      "L1_Hints": [ "BYTE", 1 ],
+      "L3_Hints": [ "BYTE", 2 ],
+      "Surface": [ "GENERAL", "UNSIGNED", 3 ],
+      "BlockHeight": [ "BYTE", 4 ],
+      "BlockWidth": [ "BYTE", 5 ],
+      "XOff": [ "GENERAL", "UNSIGNED", 6 ],
+      "YOff": [ "GENERAL", "UNSIGNED", 7 ],
+      "Src": [ "NULLRAW" ]
+    },
+    "genx_lsc_store2d_typed_bti" : {
+      "opc": "ISA_LSC_TYPED",
+      "gen_opc": "ISA_LSC_TYPED_2D",
+      "sub_opc": [ "LITERAL", "LSC_STORE_BLOCK2D" ],
+      "address_model": [ "LITERAL", "LSC_ADDR_TYPE_BTI" ],
+      "Dst": [ "NULLRAW" ],
+      "L1_Hints": [ "BYTE", 1 ],
+      "L3_Hints": [ "BYTE", 2 ],
+      "Surface": [ "GENERAL", "UNSIGNED", 3 ],
+      "BlockHeight": [ "BYTE", 4 ],
+      "BlockWidth": [ "BYTE", 5 ],
+      "XOff": [ "GENERAL", "UNSIGNED", 6 ],
+      "YOff": [ "GENERAL", "UNSIGNED", 7 ],
+      "Src": [ "RAW", 8 ]
+    },
     "genx_lsc_fence": {
       "opc": "ISA_LSC_FENCE",
       "exec_size": [ "EXECSIZE_FROM_ARG", 1 ],
@@ -3992,11 +3994,12 @@
     ],
     "ISA_LSC_TYPED_2D": [
       "LSC_DATA_SHAPE_TYPED_BLOCK2D dataShape2D",
+      "LSC_CACHE_OPTS cache {(LSC_CACHE_OPT) L1_Hints, (LSC_CACHE_OPT) L3_Hints}",
       "dataShape2D.height = BlockHeight",
       "dataShape2D.width = BlockWidth",
       [ "CreateLscTyped2D",
         "sub_opc",
-        "CacheOpts",
+        "cache",
         "address_model",
         "Surface",
         "dataShape2D",

IGC/VectorCompiler/lib/GenXOpts/CMTrans/GenXTranslateIntrinsics.cpp

@@ -59,7 +59,6 @@ class GenXTranslateIntrinsics final
   Value *translateLscLoadStoreBlock2D(CallInst &I) const;
   Value *translateLscLoadStore2DDesc(CallInst &I) const;
   Value *translateLscTyped(CallInst &I) const;
-  Value *translateLscTyped2D(CallInst &I) const;
 };
 } // namespace
 
@@ -158,11 +157,6 @@ void GenXTranslateIntrinsics::visitCallInst(CallInst &I) const {
   case GenXIntrinsic::genx_lsc_store_2d_ugm_desc:
     NewI = translateLscLoadStore2DDesc(I);
     break;
-  case GenXIntrinsic::genx_lsc_load2d_typed_bti:
-  case GenXIntrinsic::genx_lsc_store2d_typed_bti:
-  case GenXIntrinsic::genx_lsc_prefetch2d_typed_bti:
-    NewI = translateLscTyped2D(I);
-    break;
   case GenXIntrinsic::genx_lsc_load_merge_quad_typed_bti:
   case GenXIntrinsic::genx_lsc_prefetch_quad_typed_bti:
   case GenXIntrinsic::genx_lsc_store_quad_typed_bti:
@@ -659,63 +653,3 @@ Value *GenXTranslateIntrinsics::translateLscTyped(CallInst &I) const {
 
   return NewI;
 }
-
-Value *GenXTranslateIntrinsics::translateLscTyped2D(CallInst &I) const {
-  auto IID = GenXIntrinsic::getGenXIntrinsicID(&I);
-  LLVM_DEBUG(dbgs() << "Translate: " << I << "\n");
-  IRBuilder<> Builder(&I);
-  Module *M = I.getModule();
-
-  auto *L1Control = cast<Constant>(I.getArgOperand(0));
-  auto *L3Control = cast<Constant>(I.getArgOperand(1));
-  auto *CacheOpts = translateCacheControls(L1Control, L3Control);
-
-  auto *BTI = I.getArgOperand(2);
-  auto *BlockHeight = I.getArgOperand(3);
-  auto *BlockWidth = I.getArgOperand(4);
-  auto *X = I.getArgOperand(5);
-  auto *Y = I.getArgOperand(6);
-
-  Value *Src = nullptr;
-  auto *Ty = I.getType();
-
-  auto NewIID = vc::InternalIntrinsic::not_internal_intrinsic;
-
-  switch (IID) {
-  default:
-    IGC_ASSERT_UNREACHABLE();
-  case GenXIntrinsic::genx_lsc_load2d_typed_bti:
-    Src = UndefValue::get(Ty);
-    NewIID = vc::InternalIntrinsic::lsc_load_2d_tgm_bti;
-    break;
-  case GenXIntrinsic::genx_lsc_store2d_typed_bti:
-    Src = I.getArgOperand(7);
-    NewIID = vc::InternalIntrinsic::lsc_store_2d_tgm_bti;
-    break;
-  }
-
-  SmallVector<Type *, 2> Types;
-  if (!Ty->isVoidTy())
-    Types.push_back(Ty);
-  Types.push_back(CacheOpts->getType());
-  if (Src && Ty->isVoidTy())
-    Types.push_back(Src->getType());
-
-  auto *Func = vc::InternalIntrinsic::getInternalDeclaration(M, NewIID, Types);
-
-  SmallVector<Value *, 6> Args = {
-      CacheOpts,
-      BTI,
-      BlockWidth,
-      BlockHeight,
-      X,
-      Y,
-  };
-  if (Src)
-    Args.push_back(Src);
-
-  auto *NewI = Builder.CreateCall(Func, Args);
-  LLVM_DEBUG(dbgs() << "New intrinsic generated: " << *NewI);
-
-  return NewI;
-}

IGC/VectorCompiler/lib/InternalIntrinsics/InternalIntrinsics.cpp

@@ -735,8 +735,6 @@ bool InternalIntrinsic::isInternalMemoryIntrinsic(InternalIntrinsic::ID id) {
   case InternalIntrinsic::lsc_load_2d_ugm_desc_vnni:
   case InternalIntrinsic::lsc_prefetch_2d_ugm_desc:
   case InternalIntrinsic::lsc_store_2d_ugm_desc:
-  case InternalIntrinsic::lsc_load_2d_tgm_bti:
-  case InternalIntrinsic::lsc_store_2d_tgm_bti:
     return true;
   }
 
@@ -903,15 +901,6 @@ InternalIntrinsic::getMemoryRegisterElementSize(const llvm::Instruction *I) {
     auto *Ty = LastArg->getType();
     return Ty->getScalarType()->getPrimitiveSizeInBits();
   } break;
-  case InternalIntrinsic::lsc_store_2d_tgm_bti: {
-    auto *LastArg = I->getOperand(6);
-    auto *Ty = LastArg->getType();
-    return Ty->getScalarType()->getPrimitiveSizeInBits();
-  } break;
-  case InternalIntrinsic::lsc_load_2d_tgm_bti: {
-    auto *Ty = I->getType();
-    return Ty->getScalarType()->getPrimitiveSizeInBits();
-  } break;
   }
 
   auto *ElementSize = cast<ConstantInt>(I->getOperand(ElementSizeIndex));
@@ -949,9 +938,6 @@ int InternalIntrinsic::getMemoryCacheControlOperandIndex(unsigned IID) {
   case InternalIntrinsic::lsc_prefetch_2d_ugm_desc:
   case InternalIntrinsic::lsc_store_2d_ugm_desc:
     return 1;
-  case InternalIntrinsic::lsc_load_2d_tgm_bti:
-  case InternalIntrinsic::lsc_store_2d_tgm_bti:
-    return 0;
   default:
     break;
   }