Skip to content

Commit

Permalink
Fix cross lock issue (#183)
Browse files Browse the repository at this point in the history
* Always stop r820 no matter if init is done

* Add delay before checking PLL lock state
  • Loading branch information
howard0su authored Mar 17, 2021
1 parent e81139f commit 4b08360
Show file tree
Hide file tree
Showing 4 changed files with 27 additions and 42 deletions.
Binary file modified Core/SDDC_FX3.img
Binary file not shown.
55 changes: 23 additions & 32 deletions SDDC_FX3/USBhandler.c
Original file line number Diff line number Diff line change
Expand Up @@ -212,42 +212,33 @@ CyFxSlFifoApplnUSBSetupCB (
uint32_t freq;
freq = *(uint32_t *) &glEp0Buffer[0];

// use xtal to check if r820 is intialized already
// if so, skip the intialize if xtal is not changed
if (tuner_config.xtal != freq)
memset(&tuner_config, 0, sizeof(tuner_config));
memset(&tuner, 0, sizeof(tuner));

tuner_config.vco_curr_min = 0xff;
tuner_config.vco_curr_max = 0xff;
tuner_config.vco_algo = 0;

// detect the hardware
if (HWconfig == RX888 || HWconfig == BBRF103)
{
memset(&tuner_config, 0, sizeof(tuner_config));
memset(&tuner, 0, sizeof(tuner));

tuner_config.vco_curr_min = 0xff;
tuner_config.vco_curr_max = 0xff;
tuner_config.vco_algo = 0;

// detect the hardware
if (HWconfig == RX888 || HWconfig == BBRF103)
{
tuner_config.xtal = freq;
tuner_config.i2c_addr = R820T_I2C_ADDR;
tuner_config.rafael_chip = CHIP_R820T;
}
else if (HWconfig == RX888r2)
{
tuner_config.xtal = freq;
tuner_config.i2c_addr = R828D_I2C_ADDR;
tuner_config.rafael_chip = CHIP_R828D;
}
si5351aSetFrequencyB(tuner_config.xtal);

tuner.cfg = &tuner_config;

uint32_t bw;
r82xx_init(&tuner);
r82xx_set_bandwidth(&tuner, 8*1000*1000, 0, &bw, 1);
tuner_config.xtal = freq;
tuner_config.i2c_addr = R820T_I2C_ADDR;
tuner_config.rafael_chip = CHIP_R820T;
}
else
else if (HWconfig == RX888r2)
{
si5351aSetFrequencyB(tuner_config.xtal);
tuner_config.xtal = freq;
tuner_config.i2c_addr = R828D_I2C_ADDR;
tuner_config.rafael_chip = CHIP_R828D;
}
si5351aSetFrequencyB(tuner_config.xtal);

tuner.cfg = &tuner_config;

uint32_t bw;
r82xx_init(&tuner);
r82xx_set_bandwidth(&tuner, 8*1000*1000, 0, &bw, 1);

vendorRqtCnt++;
isHandled = CyTrue;
Expand Down
13 changes: 4 additions & 9 deletions SDDC_FX3/tuner_r82xx.c
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,7 @@
#define DEFAULT_HARMONIC 5
#define PRINT_HARMONICS 0

#define DELAYPLL 4

/* #define VGA_FOR_AGC_MODE 16 */
#define DEFAULT_IF_VGA_VAL 11
Expand Down Expand Up @@ -903,6 +904,7 @@ static int r82xx_set_pll_yc(struct r82xx_priv *priv, uint32_t freq)
priv->tuner_pll_set = 1;

/***/
CyU3PThreadSleep(DELAYPLL);

/* Check if PLL has locked */
rc = r82xx_read(priv, 0x00, data, 3);
Expand Down Expand Up @@ -1117,6 +1119,8 @@ static int r82xx_set_pll(struct r82xx_priv *priv, uint32_t freq)
/* all PLL stuff / registers set for this frequency - except 8 kHz pll autotune */
priv->tuner_pll_set = 1;

CyU3PThreadSleep(DELAYPLL);

for (i = 0; i < 2; i++) {

/* Check if PLL has locked */
Expand Down Expand Up @@ -2086,10 +2090,6 @@ int r82xx_standby(struct r82xx_priv *priv)
{
int rc;

/* If device was not initialized yet, don't need to standby */
if (!priv->init_done)
return 0;

rc = r82xx_write_reg(priv, 0x06, 0xb1);
if (rc < 0)
return rc;
Expand Down Expand Up @@ -2122,9 +2122,6 @@ int r82xx_standby(struct r82xx_priv *priv)
return rc;
rc = r82xx_write_reg(priv, 0x19, 0x0c);

/* Force initial calibration */
priv->type = -1;

return rc;
}

Expand Down Expand Up @@ -2195,8 +2192,6 @@ int r82xx_init(struct r82xx_priv *priv)
priv->haveR30L = priv->valR30L = 0;
#endif

priv->init_done = 1;

#if USE_R82XX_ENV_VARS
// read environment variables
if (1) {
Expand Down
1 change: 0 additions & 1 deletion SDDC_FX3/tuner_r82xx.h
Original file line number Diff line number Diff line change
Expand Up @@ -99,7 +99,6 @@ struct r82xx_priv {
int has_lock;
int tuner_pll_set;
int tuner_harmonic;
int init_done;
int sideband;
int disable_dither;

Expand Down

0 comments on commit 4b08360

Please sign in to comment.