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16 bit CPU design with Assembler in C and Simulator in C. Assembler and Sim worked, hardware 80% completed. Design was in Xilinx Foundation for FPGA. Was on OpenCores distribution in 1999.
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<title>f-cpu: GNU License for Hardware</title> <body marginwidth=10 leftmargin=20><font face="verdana,geneva,helvetica" size=2> Below is the GNU Public Licence for the Piranha F0016 (and all other variants produced by the Piranha Project).<br> <br> Piranha CPU variants covered by this licence:<br> 1. F0016.<br> <br> The text below is supplied by Jamil Khatib of www.openip.org.<br> <br> <br> The attached License is the OpenIP Hardware public license. The license<br> covers OpenHardware designes a la GPL.<br> You are welcome to use the draft version and to to send us your comments<br> <br> Another License a la LGPL will be published soon<br> <br> You can send all your comments to <a href="mailto:[email protected]" >[email protected]</a><br> You can also visit our site at<br> <a href="http://www.openip.org" target="_top" >http://www.openip.org</a><br> Thanks for your comments<pre>OpenIP General Hardware Public License Draft Version 0.15-111099 October 1999</pre><p> <p> <pre> Copyright (C) 1999 OpenIP Organization. Everyone is permitted to copy and distribute verbatim copies of this license document, but changing it is not allowed.</pre><p> <p> <p> <p> OpenIP/OpenCore License terms. <p> <p> TERMS AND CONDITIONS FOR COPYING, DISTRIBUTION, MODIFICATION AND IMPLEMENTATIONS <p> <p> 1. This license applies to hardware designs including the design ideas, architectures, microcode instructions source and supporting files (e.g. schematics, net-lists, HDLs, PCB layouts, chip & silicon cells layouts, Timing diagrams, truth tables, flow charts, state diagrams, block diagrams, Documentations, software drivers etc...) Or any other work which contains a notice placed by the copyright holder saying it may be distributed under the terms of this General Hardware Public License. The "Hardware Design", below refers to any such work. <p> <p> Activities other than copying, distribution, modification and implementations are not covered by this License ; they are outside its scope. The act of operating the design is not restricted, and the output of it is covered only if its contents constitute a work based on the original work. <p> <p> 2. You may copy, publish, distribute or/and implement this Hardware Design or any portion of it as is. Any time you copy or distribute this design you have to provide all of the source files and documentations that came with the work. <p> <p> <br> 3. Any modifications of this hardware design or any derivative work from it should be documented and protected by the same license. The term Derivative work means any changes, improvements or porting the original work to other environments or platforms (To be described later on). This may vary depending on the type of the hardware design itself.<p> <p> <br> 4. There are three types of derivative works. <br> a. The first one is to modify the original design files ( e.g. schematics, HDLs, Architectures, chip or PCB Layouts) and get some new improvements or features. <p> <p> b. Porting the source files into different EDA or system environments. This includes porting HDLs to different simulators, synthesis tools or target hardware. Redrawing Schematics on different tools. Changing the format of the design among any of the following formats: HDLs, schematics, Chip or PCB layout, net-list extraction. Porting the design to different board chip or packaging technologies. <p> <p> c. In case the design introduces a new Hardware Design ideas, algorithm or architectures, or even if it is itself one of those, any physical implementation or by schematics, HDLs, layouts, net-lists or any other form that describes the design except the ordinal is considered as a derived work. <p> <p> 4. Works based on the hardware design should be protected also by the same license. <p> <p> <p> Based work can be one or all of the followings: <br> <br> Using the whole or part of the design as is and put (integrate) it in a new system or new platform. That includes plugging the HDL code, schematic, PCB or chip layout to a chip, board, new set of schematics or even any form of description a design (documents, block diagram, flow charts, state diagrams tables). <p> <p> <p> <p> 5. No one can sell the Hardware Design itself, its derivatives or any work based on it. Physical implementation of the Hardware design can be sold only if all design source files that came with the original work and documentation made available for the user. <p> <p> 6. You are not required to accept this License, since you have not signed it. However, nothing else grants you permission to modify or distribute the hardware design or its derivative works. These actions are prohibited by law if you do not accept this License. Therefore, by modifying, distributing or implementing the hardware design (or any work based on the design), you indicate your acceptance of this License to do so, and all its terms and conditions for copying, distributing or modifying the hardware design or works based on it. <p> <p> <p> <p> 7. NO WARRANTY of any kind is provided on the functionality, performance or risks cased by using this Hardware Design. <p> <p> NO WARRANTY <p> <p> 7.a. BECAUSE THE HARDWARE DESIGN IS LICENSED FREE OF CHARGE, THERE IS NO WARRANTY FOR IT, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE HARDWARE DESIGN IMPLEMENTATION "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS TO THE QUALITY AND PERFORMANCE OF THE HARDWARE DESIGN IS WITH YOU. SHOULD THE DESIGN PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY SERVICING, REPAIR OR CORRECTION. <p> <p> 7.b. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE THE HARDWARE DESIGN AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE THE HARDWARE DESIGN (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR OR THIRD PARTIES OR OR ANY OTHER KIND OF LOSSES OR A FAILURE OF THE HARDWARE DESIGN IMPLEMENTATION TO OPERATE WITH ANY OTHER SYSTEMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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16 bit CPU design with Assembler in C and Simulator in C. Assembler and Sim worked, hardware 80% completed. Design was in Xilinx Foundation for FPGA. Was on OpenCores distribution in 1999.
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