[MIPS] Malta: Fix off by one bug in interrupt handler.

Fairly cosmetic as it would only affect VSMP / SMTC kernels that don't use vectored interrupts. Found by Beth. Signed-off-by: Ralf Baechle <[email protected]>
hardkernel · Sep 14, 2007 · 48d480b · 48d480b
1 parent 6440fcf
commit 48d480b
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/arch/mips/mips-boards/malta/malta_int.c b/arch/mips/mips-boards/malta/malta_int.c
@@ -256,7 +256,7 @@ asmlinkage void plat_irq_dispatch(void)
 
 	if (irq == MIPSCPU_INT_I8259A)
 		malta_hw0_irqdispatch();
-	else if (irq > 0)
+	else if (irq >= 0)
 		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
 	else
 		spurious_interrupt();