CHROMIUM: ASoC: samsung: Route clocks to i2s.

Configure the clocks so that the i2s block is driven with a clock that
can be divided to the current audio frequency.  The rate of epll is
already being adjusted to match the frame rate, but epll was not being
configured to drive the audio clocks.  At init, set the clock muxes to
route epll through the muxes.  This fixes audio on Daisy playing back
too fast (6% fast for 44.1, almost 2x for 48k).

BUG=chrome-os-partner:11225
TEST=Play sine waves of various frequencies and check they are rendered
correctly with a spectrum analyzer.

Change-Id: I46c5f466088a825942931007b49fcde2e40e9fc6
Signed-off-by: Dylan Reid <[email protected]>
Reviewed-on: https://gerrit.chromium.org/gerrit/28453
Reviewed-by: Olof Johansson <[email protected]>

sound/soc/samsung/daisy_max98095.c

@@ -36,6 +36,77 @@
 #include "s3c-i2s-v2.h"
 #include "../codecs/max98095.h"
 
+/* Audio clock settings are belonged to board specific part. Every
+ * board can set audio source clock setting which is matched with H/W
+ * like this function-'set_audio_clock_heirachy'.
+ */
+static int set_audio_clock_heirachy(struct platform_device *pdev)
+{
+	struct clk *fout_epll, *mout_epll, *sclk_audbus, *audss, *i2sclk;
+	int ret = 0;
+
+	fout_epll = clk_get(NULL, "fout_epll");
+	if (IS_ERR(fout_epll)) {
+		printk(KERN_WARNING "%s: Cannot find fout_epll.\n",
+				__func__);
+		return -EINVAL;
+	}
+
+	mout_epll = clk_get(NULL, "mout_epll");
+	if (IS_ERR(mout_epll)) {
+		printk(KERN_WARNING "%s: Cannot find mout_epll.\n",
+				__func__);
+		ret = -EINVAL;
+		goto out1;
+	}
+
+	sclk_audbus = clk_get(&pdev->dev, "audio-bus");
+	if (IS_ERR(sclk_audbus)) {
+		printk(KERN_WARNING "%s: Cannot find audio-bus.\n",
+				__func__);
+		ret = -EINVAL;
+		goto out2;
+	}
+
+	audss = clk_get(&pdev->dev, "mout_audss");
+	if (IS_ERR(audss)) {
+		printk(KERN_WARNING "%s: Cannot find audss.\n",
+				__func__);
+		ret = -EINVAL;
+		goto out3;
+	}
+
+	i2sclk = clk_get(NULL, "i2sclk");
+	if (IS_ERR(i2sclk)) {
+		printk(KERN_WARNING "%s: Cannot find i2sclk.\n",
+				__func__);
+		ret = -EINVAL;
+		goto out4;
+	}
+
+	/* Set audio clock hierarchy for S/PDIF */
+	if (clk_set_parent(mout_epll, fout_epll))
+		printk(KERN_WARNING "Failed to set parent of epll.\n");
+	if (clk_set_parent(sclk_audbus, mout_epll))
+		printk(KERN_WARNING "Failed to set parent of audbus.\n");
+	if (clk_set_parent(audss, fout_epll))
+		printk(KERN_WARNING "Failed to set parent of audss.\n");
+	if (clk_set_parent(i2sclk, sclk_audbus))
+		printk(KERN_WARNING "Failed to set parent of i2sclk.\n");
+
+	clk_put(i2sclk);
+out4:
+	clk_put(audss);
+out3:
+	clk_put(sclk_audbus);
+out2:
+	clk_put(mout_epll);
+out1:
+	clk_put(fout_epll);
+
+	return ret;
+}
+
 static int set_epll_rate(unsigned long rate)
 {
 	int ret;
@@ -320,10 +391,12 @@ static int __init daisy_audio_init(void)
 
 	platform_set_drvdata(daisy_snd_device, &daisy_snd);
 	ret = platform_device_add(daisy_snd_device);
-	if (ret)
+	if (ret) {
 		platform_device_put(daisy_snd_device);
+		return ret;
+	}
 
-	return ret;
+	return set_audio_clock_heirachy(daisy_snd_device);
 }
 module_init(daisy_audio_init);