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Wiring-liveness wave-3 / #5364: whole-tree enumeration substrate (gate-flip deferred to resolved_imports grounding) - #5743
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…e-flip deferred to resolve grounding) whole_tree_resolved_ctx resolves every .dag module under given source roots in one pass, so the reflection accessor fn_arrow_decl_facts_live (walking ctx.modules) enumerates fn-arrow decls whole-tree, not per-entry-closure. Green-by-execution anchor (whole_tree_wiring_enum_test): over a self-contained 3-module fixture where wt.a/wt.b do not import each other, the whole-tree pass enumerates BOTH modules' fns while wt.a's per-entry closure sees only its own — the widening, with a no-whole-tree control. The whole-tree wiring GATE over the real corpus is DEFERRED (DESIGN 5 wall-after- grounding): src/v2 does not whole-tree-resolve today (the v2.lens.resolved_imports open thread). Existing per-entry gate stays live; bin wiring_liveness_whole_tree is the not-yet-floor-enrolled vehicle that flips when that grounding lands. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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…ILES #5743 added src/v1/tests/fixtures/whole_tree_wiring_enum/*.dag fixtures which emit wt_a.rs, wt_b.rs, wt_common.rs but did not register them in GENERATED_STAGE0_FILES, causing assert_output_set_matches_registry to fail with "unregistered stage0 file(s)" before the std_serialization.rs missing check could fire. Register all three (consistent with the existing v1_test_non_ascii_perf_fixture.rs precedent for fixture modules).
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… import (#5761) * WIP: Lane A keystone-blocker: std_serialization closure-drift -- dsl/std/seri * WIP: Lane A keystone-blocker: std_serialization closure-drift -- dsl/std/seri * chore: remove stray scratch file swept in by auto-committer sorted-Vec was a git-log output redirected into the worktree root and captured by the session auto-committer. Not related to the fix. * fix(regen_stage0): register wt_a/wt_b/wt_common in GENERATED_STAGE0_FILES #5743 added src/v1/tests/fixtures/whole_tree_wiring_enum/*.dag fixtures which emit wt_a.rs, wt_b.rs, wt_common.rs but did not register them in GENERATED_STAGE0_FILES, causing assert_output_set_matches_registry to fail with "unregistered stage0 file(s)" before the std_serialization.rs missing check could fire. Register all three (consistent with the existing v1_test_non_ascii_perf_fixture.rs precedent for fixture modules). --------- Co-authored-by: Brian Searls <briansrls@gunb.ai>
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The gate-flip strip erroneously deleted wiring_liveness_whole_tree.rs and its Cargo.toml entry, which were already on main from #5743. Also drops the orphaned transport scaffolding (wiring_liveness_transport.dag, ensure_wiring_liveness_whole_tree_built in host_prelude.dag, roster row) and the dead-code addition to coproduct_reflection.rs (check_wiring_ liveness_streaming had no callers once the binary was stripped from this branch — but since the binary was already on main from #5743, those additions were pre-orphaned from the start). Net diff of this PR vs main is now the underscore-prefix sweep only (plus two inherited drift fixes), with no gate-flip and no dead code. Co-Authored-By: Claude Sonnet 4.6 <noreply@anthropic.com>
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Wiring-liveness wave-3 / #5364 — whole-tree enumeration substrate (gate-flip deferred to resolve grounding)
Owns the reflection SOURCE / enumeration side (not the body→skeleton projection — that is bright-ferret-373's lane; this PR keeps
marshal_fn_body_skeletonbyte-identical).What landed
cli_run::whole_tree_resolved_ctx— resolves every.dagmodule under the given source roots in one pass and returns aWholeTreeCtx. The reflection accessorfn_arrow_decl_facts_livewalksctx.modules, so over this context it enumerates fn-arrow decls whole-tree, not per-entry-import-closure. Marshaling runs in this ctx's own interner (no cross-contextSymbolmismatch — the reason a precompute-and-inject of marshaledValues is unsound).v1-compiler-tests::whole_tree_wiring_enum_test, hermetic, 0.03s): over a self-contained 3-module fixture wherewt.a/wt.bdo not import each other, the whole-tree pass enumerates both modules' fns whilewt.a's per-entry closure sees only its own. That delta — with the no-whole-tree control — is the widening.wiring_liveness_whole_treebin — the diagnostic / future floor-gate vehicle. Not floor-enrolled (so it cannot fleet-red).What is deferred, and why (the honest boundary — DESIGN §5 wall after grounding)
The whole-tree wiring gate over the real corpus is NOT flipped. Proven 4 ways by execution: the
src/v2corpus does not whole-tree-resolve today — test scaffolds (modulesv2.test.*, scattered) and even non-test modules (v2.lens.testgen→v2.test.manual.*,v2.program,v2.workflow.probe_selector) carry imports that only resolve inside a scoped closure, and the pipeline short-circuits the whole graph toNoneon any unresolved import (the advisory gate does not relaxUnresolvedImport). This is the documentedv2.lens.resolved_importsopen thread.Named dissolution trigger: when that whole-tree-resolve grounding lands (
front_end_sourcesno longer short-circuits tograph: None), this bin enrolls in the floor and the existing per-entrywiring_liveness_corpus_is_cleanflips to whole-tree. Until then the existing per-entry gate stays live — no coverage regression, no dirty-tree fleet-red.Scope
3 source files + 1 test + 3 tiny fixtures. No
.dagpipeline/lens edits; the projection seam is untouched. fmt + clippy (-D warnings, both crates) clean; main integrated via merge commit.🤖 Generated with Claude Code