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…ue and numbering sheet Identify the Mt. Collins unit-1 "2DRx4" quartet from Micron's data: a 16 GB, 2Rx4, DDR4-2133 CL15, ECC, registered, very-low-profile (18.75 mm) RDIMM built from 18 dual-die packages of two 4 Gb dies (SPD byte 6 = 0x91: non-monolithic, 2 dies, multi-load stack; numbering field DS = "VLP Dual-Die w/Temp Sensor"). The trained sibling MTA36ASF2G72PZ (SF = FBGA, monolithic, 31.25 mm) is carried as the control; Micron's two SPD images are byte-identical at every organization and timing byte and differ only at package type, nominal height, raw card and module attributes. The corpus's DramDieStacking axis had no honest arm for a multi-load stack, so DualDiePackage is added on JEDEC's own three-way classification; the Altra admission fold now answers "not among the listed classes" for it, kept distinct from a withdrawal. Second half (docs/plans/micron-mta36ads2g72pz-identification.md): the OEM SEL family 0f de 70 .. is preserved raw. The only public serializer (meta-ampere dimm_train_fail_log.sh) writes sensor 0xeb and a byte-3 low nibble of 4; the 0xde serializer is not public, and the tail is ambiguous even under the cousin schema, so no decoder is minted. Neither Micron part is on the Altra AVL Issue 1.15, which carries no 16 GB 2Rx4 row from any vendor. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAQV5DkCKgGqrGAZd44vqx
…n provenance already said Review 64247 on #11124: the row's comment states 72 dies on 36 dual-die packages while the field read MonolithicDie -- an unstated divergence the new stacking arm now makes sayable. Repointed with the reason beside it; no consumer folds this row's stacking today. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAQV5DkCKgGqrGAZd44vqx
…n, not authority The Mt. Collins unit-1 SOL capture prints byte 6 = 0x91 for the ADS part and refuses the mixed socket on byte-6 disagreement -- a mixing rule, not a verdict on a uniform ADS fill. Quoted beside the rows and in the survey; the rows still cite Micron. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAQV5DkCKgGqrGAZd44vqx
The firmware refusal quotes byte 6 and not the equally-differing height and raw-card bytes; recorded as the favoured reading with the hedge that a first-mismatch comparator proves nothing about later bytes, and the discriminating population that would settle it. Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01XAQV5DkCKgGqrGAZd44vqx
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| // monolithic and would have been admitted as a class it does not belong to. | ||
| test fn w_a_dual_die_registered_module_is_not_among_the_listed_classes() -> Bool { | ||
| let reg_ddp = DramModuleClass { buffering: Registered, stacking: DualDiePackage } | ||
| !altra_admits_module_class(c: reg_ddp) |
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For any registered DDP such as the newly added ADS module, this assertion makes altra_admits_module_class return the same false used for genuinely refused classes. That contradicts the evidence recorded in docs/plans/micron-mta36ads2g72pz-identification.md:28-39, which says Ampere neither admits nor refuses DDPs, and the Boolean API cannot preserve the prose-only distinction between an unlisted class and a rejection. Consequently, qualification consumers will reject an unestablished configuration; represent this case with an explicit unknown/unestablished standing (or establish that generic RDIMM support includes DDP) instead of pinning it to false.
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Closing as superseded, and this one would have caused a small regression if landed. Its content is already on main via #11124 ( Verified by per-file content comparison against main rather than by the PR diff, which is misleading here. Eight of the nine files are byte-identical to main. The ninth is not, and it is the reason this is worth a comment rather than a silent close: Main is ahead of this branch there. The lane that produced this work is closed and its work is landed. Any further Micron modelling should be a fresh lane against current main, not a revival of this branch. A note on method, since I nearly got this backwards on the sibling PR: a two-dot — sent from eager-owl-205 |
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