ROCm: the compiled pipeline can lower tile.mma (via-tile reachable)

[gstoner]

Closes the first of the two gaps W1_1_TYPING_DESIGN.md §4.3 identified.

The gap

GenerateWMMAGemmKernel{via-tile=true} emits tile.mma %a, %b, %acc, and its own comment says the op "flows through rocm-wave-lds-pipeline + lower-tile-to-rocm". Neither runtime pipeline contained that pass. tile.mma survived to LLVM translation:

cannot be converted to LLVM IR: missing `LLVMTranslationDialectInterface`
registration for dialect for op: tile.mma

So W1.1's Tile-IR seam was unreachable from the lane that actually executes — including the canonical pipeline, which already runs tessera-tile-ir-lowering and rocm-wave-lds-pipeline and still had no tile→ROCm lowering after the generator.

Verified in both directions

Default path unchanged. With via-tile off there's no tile.mma to lower, and the emitted hsaco is byte-identical with and without the pass — diffed at the tessera-opt level before making the change, since adding a pass to a working production lane needs evidence rather than an assumption.

via-tile now reachable. Injecting only via-tile=true (no hand-added lowering) compiles and runs bit-identical to the production lane on gfx1151:

shape	|base − via-tile|	|via-tile − numpy|
64×64×64	0	1.8e-06
256×256×256	0	1.3e-05
128×96×64	0	2.2e-06

Every measurement carried the bogus-option control (inject an invalid pass option, require ok=False) — an earlier run of this experiment reported bit-identical output while the injection silently never applied.

arch= is mandatory, and gated

lower-tile-to-rocm defaults to a CDNA part and emits llvm.amdgcn.mfma.contract — an MFMA intrinsic wrong for RDNA 3.5 that doesn't resolve. The pipeline string stays syntactically valid, so this fails at link time rather than parse time. Hence a gate, not a comment.

Gates

test_rocm_pipeline_tile_lowering.py counts lowerings against generators (a third lane added without one fails here), forbids the arch-less spelling, and compares numerics on hardware. Teeth verified by deleting one pipeline's pass — structural and hardware tests both fail.

Remaining from §4.3

TileToROCM's typed branch still requires a FragmentZeroOp accumulator, so the typed form can't yet do what the untyped one now demonstrably does. That's next.

14442 unit, mypy 0, ruff clean, docs in sync.

🤖 Generated with Claude Code

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