Apple GPU Tier-2: batched matmul (bmm) + relax numpy <2.0.0 pin - #17
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Tier-2 keystone — batched / rank-3+ matmul on Apple GPU:
- MPSGraph-backed tessera_apple_gpu_bmm_{f32,f16} (bf16 host-upcast) with a
b_broadcast flag for a shared [1,K,N] B operand (projection + GQA KV-sharing);
reuses the MPSGraph graph cache + buffer pool. Non-Darwin stub parity.
- runtime.py: _apple_gpu_dispatch_bmm + ctypes wrappers; rank-3+ tessera.matmul
/ tessera.batched_gemm route through it (rank-4+ folds leading dims to batch).
tessera.batched_gemm added to the driver/runtime MPS envelopes so it reports
execution_mode="metal_runtime" on @jit(target="apple_gpu").
- tests/unit/test_apple_gpu_bmm.py (10): batched/broadcast/fold, f32/f16/bf16,
per-head attention scores, symbol export, @jit metal_runtime gate.
Relax the numpy<2.0.0 pin (pyproject + requirements -> numpy>=1.21.0): Tessera
runs under numpy 1.x and 2.x. The 4 numpy-stub-sensitive mypy sites (savez x2,
nditer op_flags x2) are made portable via Any-typing (no version-specific
ignore), keeping mypy clean on both.
Docs: docs/apple_gpu_tier2_tier3_plan.md (Tier 2/3 roadmap), kernel inventory +
runtime ABI dashboard updated.
Verified on Apple Silicon: full suite 5,795 passed / 0 failures under numpy
2.4.6; mypy 0; tessera-ir lit 61 PASS / 0 FAIL.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This was referenced May 30, 2026
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…le layer)
Drives the pipeline-parallel layer from annotation/scaffold to real SSA
partitioning + a verified 1F1B schedule, mirroring the warp-spec playbook
(real emission verified by a legality gate).
- PipelineStagePartitionPass (--tessera-pipeline-partition): cost-balanced,
program-order-monotonic partition of each function into num_stages, emitting
tessera.pp_stage. Replaces the prior external-tag-only requirement ("true
cost-model partition deferred to Phase 5"). Heavy ops (matmul/gemm/flash_attn/
conv) weigh more; monotonic program order keeps defs before uses (no backward
cross-stage edge).
- The existing PipelineStageInsertionPass already does the genuine send/recv SSA
rewire (use.set to the recv) — now driven by the real partition.
- PipelineScheduleLegalityPass (--tessera-pipeline-schedule-legality): the 1F1B
proof — PP_MICRO_BATCHES_TOO_FEW (Decision #17: >= num_stages, >= 2*num_stages
interleaved), PP_EMPTY_STAGE, PP_SEND_WITHOUT_RECV / PP_RECV_WITHOUT_SEND
(forward-adjacent pairing), and PP_UNROUTED_CROSS_STAGE_VALUE — the value-
rewrite-completeness check that catches a stage-skipping SSA edge the
adjacent-only insertion silently leaves unrouted.
- Chained as the `tessera-pipeline` named pipeline (partition → insertion →
schedule-legality).
Registries synced: 5 PP_* codes (diagnostic_codes), 3 passes (pass_metadata),
the tessera-pipeline pipeline (pipeline_registry); test_coverage regenerated.
Verified: full tests/tessera-ir lit 162 passed / 0 failed (new
pipeline_partition + pipeline_schedule_legality fixtures); registry + C++-code
drift gates green; 17 generated docs in sync; mypy clean.
Still annotation-level: the explicit warmup/steady/cooldown step order isn't
emitted (the proof verifies the structural 1F1B contract). Next on this layer.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Tier-2 keystone — batched / rank-3+ matmul on Apple GPU:
Relax the numpy<2.0.0 pin (pyproject + requirements -> numpy>=1.21.0): Tessera runs under numpy 1.x and 2.x. The 4 numpy-stub-sensitive mypy sites (savez x2, nditer op_flags x2) are made portable via Any-typing (no version-specific ignore), keeping mypy clean on both.
Docs: docs/apple_gpu_tier2_tier3_plan.md (Tier 2/3 roadmap), kernel inventory + runtime ABI dashboard updated.
Verified on Apple Silicon: full suite 5,795 passed / 0 failures under numpy 2.4.6; mypy 0; tessera-ir lit 61 PASS / 0 FAIL.