internal/cabi: support risc-v specific target-abi#1308
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PR Review: RISC-V CABI Support ✅Reviewing PR #1308 that adds RISC-V (riscv64/riscv32) and ESP32C3 target support to the CABI system. Todo List:
Review AnalysisArchitecture & DesignThis PR significantly expands LLGO's C ABI support by adding comprehensive RISC-V target support. The implementation is well-architected with several key strengths: ✅ Strengths:
Code Quality & Implementation✅ Well-implemented:
// Before:
func NewTransformer(prog ssa.Program, targetName string, mode Mode, optimize bool)
// After:
func NewTransformer(prog ssa.Program, targetName string, targetAbi string, mode Mode, optimize bool)
Test Data & Consistency✅ Comprehensive Coverage:
Cross-compilation Support✅ Good Integration:
Potential Issues🔍 Technical Concerns:
🔍 Missing Documentation:
Specific Code Issues// internal/cabi/arch.go:376-385
switch p.mabi {
case MABI_LP64F, MABI_LP64D:
if types[0] == ctx.FloatType() {
return info
}
}Suggestion: Consider documenting why only float32 is handled here and not float64 for LP64F. // internal/build/build.go:216-218
if conf.Target != "" && export.TargetABI != "" && conf.TargetAbi == "" {
conf.TargetAbi = export.TargetABI
}Good: Proper fallback logic for ABI configuration. Overall AssessmentThis is a high-quality implementation that adds significant value to LLGO's cross-compilation capabilities. The RISC-V support is comprehensive and follows established patterns. However, there are some concerns around breaking changes and missing documentation. Priority Items to Address:
Recommendation: ✅ Approve with suggestions - The core implementation is solid, but addressing documentation and API stability concerns would strengthen this PR significantly. 👉 Want me to re-run this review? Just type |
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Note The number of changes in this pull request is too large for Gemini Code Assist to generate a summary. |
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Code Review Summary
This PR adds comprehensive RISC-V support to LLGO's C ABI system. The implementation is well-designed and follows established patterns. I've identified several areas for improvement and provided specific suggestions below.
Key Findings:
• Architecture Design: Excellent modular approach with proper ABI variant support
• Breaking Changes: API signature changes need consideration for backward compatibility
• Documentation: Missing documentation for new RISC-V features
• Test Coverage: Comprehensive test data with good coverage across all variants
Priority Improvements:
- Add comprehensive documentation for RISC-V ABI support
- Consider API versioning strategy for breaking changes
- Add inline documentation for complex ABI logic
- Standardize test file organization
Codecov Report✅ All modified and coverable lines are covered by tests. Additional details and impacted files@@ Coverage Diff @@
## main #1308 +/- ##
==========================================
+ Coverage 90.10% 90.21% +0.11%
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Files 43 43
Lines 12562 12658 +96
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+ Hits 11319 11420 +101
+ Misses 1087 1081 -6
- Partials 156 157 +1 ☔ View full report in Codecov by Sentry. 🚀 New features to boost your workflow:
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cabi support llvmTarget and targetAbi (riscv64/riscv32)
cabi arch: amd64 arm64 riscv64 arm i386 wasm riscv32 xtensa
llvmTarget
esp32
"llvm-target": "xtensa"
eps32c3
"llvm-target": "riscv32-unknown-none"
"target-abi": "ilp32"
targetAbi
riscv64
riscv32