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PCI: xilinx: Add Xilinx AXI PCIe Host Bridge IP driver
This is the driver for Xilinx AXI PCIe Host Bridge Soft IP. [bhelgaas: minor whitespace fixes] Signed-off-by: Srikanth Thokala <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]> Acked-by: Arnd Bergmann <[email protected]>
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* Xilinx AXI PCIe Root Port Bridge DT description | ||
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Required properties: | ||
- #address-cells: Address representation for root ports, set to <3> | ||
- #size-cells: Size representation for root ports, set to <2> | ||
- #interrupt-cells: specifies the number of cells needed to encode an | ||
interrupt source. The value must be 1. | ||
- compatible: Should contain "xlnx,axi-pcie-host-1.00.a" | ||
- reg: Should contain AXI PCIe registers location and length | ||
- device_type: must be "pci" | ||
- interrupts: Should contain AXI PCIe interrupt | ||
- interrupt-map-mask, | ||
interrupt-map: standard PCI properties to define the mapping of the | ||
PCI interface to interrupt numbers. | ||
- ranges: ranges for the PCI memory regions (I/O space region is not | ||
supported by hardware) | ||
Please refer to the standard PCI bus binding document for a more | ||
detailed explanation | ||
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Optional properties: | ||
- bus-range: PCI bus numbers covered | ||
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Interrupt controller child node | ||
+++++++++++++++++++++++++++++++ | ||
Required properties: | ||
- interrupt-controller: identifies the node as an interrupt controller | ||
- #address-cells: specifies the number of cells needed to encode an | ||
address. The value must be 0. | ||
- #interrupt-cells: specifies the number of cells needed to encode an | ||
interrupt source. The value must be 1. | ||
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NOTE: | ||
The core provides a single interrupt for both INTx/MSI messages. So, | ||
created a interrupt controller node to support 'interrupt-map' DT | ||
functionality. The driver will create an IRQ domain for this map, decode | ||
the four INTx interrupts in ISR and route them to this domain. | ||
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Example: | ||
++++++++ | ||
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pci_express: axi-pcie@50000000 { | ||
#address-cells = <3>; | ||
#size-cells = <2>; | ||
#interrupt-cells = <1>; | ||
compatible = "xlnx,axi-pcie-host-1.00.a"; | ||
reg = < 0x50000000 0x10000000 >; | ||
device_type = "pci"; | ||
interrupts = < 0 52 4 >; | ||
interrupt-map-mask = <0 0 0 7>; | ||
interrupt-map = <0 0 0 1 &pcie_intc 1>, | ||
<0 0 0 2 &pcie_intc 2>, | ||
<0 0 0 3 &pcie_intc 3>, | ||
<0 0 0 4 &pcie_intc 4>; | ||
ranges = < 0x02000000 0 0x60000000 0x60000000 0 0x10000000 >; | ||
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pcie_intc: interrupt-controller { | ||
interrupt-controller; | ||
#address-cells = <0>; | ||
#interrupt-cells = <1>; | ||
} | ||
}; |
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