vulkan: Intel Xe flash attention, GEMM optimizations(Xe-LPG Plus/Xe2/Xe3) [MEGA PR] - #24408
vulkan: Intel Xe flash attention, GEMM optimizations(Xe-LPG Plus/Xe2/Xe3) [MEGA PR]#24408fish-jiang wants to merge 4 commits into
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…PG Plus (1/3, Xe1-ARLH) Co-authored-by: Xia, Jie <jie.xia@intel.com> Co-authored-by: Liu, Russell <russell.liu@intel.com>
…G Plus/Xe2/Xe3) Co-authored-by: Xia, Jie <jie.xia@intel.com> Co-authored-by: Liu, Russell <russell.liu@intel.com>
…n for Intel MoE path (3/3, Xe-LPG Plus/Xe2/Xe3) Co-authored-by: Xia, Jie <jie.xia@intel.com> Co-authored-by: Liu, Russell <russell.liu@intel.com>
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Hi @fish-jiang, thanks for your contribution! Per our contribution guidelines, the automated PR checker found the following issue(s) that need your attention:
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…, refine Vulkan host code for temp buffer reuse and thread lock
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@fish-jiang, @jxia4intel, @sliu39, @virajwad, and the rest of the Intel team, amazing work on these PRs! With these two PRs, Vulkan is MUCH faster than SYCL (even /w FP16) on non-quantised KV Cache when running both #24406 and #24407 on my Arc Pro B70 on Windows 11. I am particularly interested in the pp8192 @ d65536 and tg128 @ d65536 results which have been absolutely stunning for lack of better words! Would be amazing to see if some of these improvements can be carried over to quantised KV cache (q8_0 and q4_1 in particular) as well. I really hope you guys can work with the maintainers of llama.cpp to implement these in some way or form, OR work on an Intel GGUF patcher that can help patch custom GGUFs for Intel GPUs that implement the changes. Also not sure if you guys are across the SYCL progress too, or if that's another team of devs from Intel. There's some interesting stuff happening there with #25025 for example. GPU Tested On: Intel Arc Pro B70 Test benches below for non-quantised KV cache across SYCL and Vulkan. |
Overview
Co-authors: @jxia4intel, @sliu39
Target platforms: Xe-LPG Plus (Arrow Lake-H iGPU), Xe2, Xe3
Flash Attention (Intel Xe)
flash_attn_hdim64/96/128) and two-phase split prefill/decode variants(head_dim, gqa_ratio)for runtime dispatch across various GQA ratios without combinatorial pipeline proliferationqk_groups)fa_copy_qstate) between prefill phasesGEMM kernel optimizations (Intel Xe)
LOAD_A_OPTpath: SLM-based A-matrix layout optimization for coopmat1bitfieldExtractoptimizationl_alt/a_l_alt, BM=128 warptile) for runtime selection when problem dimensions are smallvulkan-shaders-gen.cpp: registers all new pipeline variantsMoE optimizations (Intel Xe)
mul_mm.compshader optimization forMUL_MAT_ID: reduces unnecessary memory loads and matrix core operations for MoE modelsrms_norm + mulinto a singleRMS_NORM_MULkernel dispatch for the expert gate input calculationPerformance (Windows OS)
ARLH

LNL

B70 Arc Pro


PTL


Requirements