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perf(cake_dense_projection_det_gemm): run the half-tail TMA-store program on the sm_103a 5120 x 17408 weight gradients at T 16231 / 16384 - #8522
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…gram on the sm_103a 5120 x 17408 weight gradients at T 16231 / 16384 Re-measured on GB300 with a cooled timing frame, the half-tail program through the one-slot TMA store with 12-row raster groups (_ht_tma1) is faster than the row's plan without a key on three sm_103a weight-gradient cells that round 2 left out: - the 17408 -> 5120 weight gradient at T 16231 / 16384: its two empty sm_103a keys now carry the sm_100a key's rule (restated, so an sm_103a rule keeps winning over the parent lookup); - the 5120 -> 17408 weight gradient at T 16231: a new T-exact key next to the existing T 16384 key. Each key keeps the per-tile K partitions of the row's plan without it, so every output is bitwise equal to that plan's; every other T, sm_100a and sm_107a are unchanged. No program text changes. Tests: the sm_103a rule count, and the T-exact weight-gradient planner and device tests now cover the three sm_103a rows (program, direct orientation, whole-K plan, FP64 reference, bitwise equality with the plan without the key).
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@flashinfer-bot run tests/experimental/test_cake_dense_projection_det_gemm.py tests/experimental/test_cake_dense_projection_det_gemm_names.py tests/experimental/test_cake_dense_projection_gemm.py |
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This PR adds and updates row rules in the Cake
dense_projection_det_gemmpackage inflashinfer.experimental, the deterministic dense projection GEMM. The package has 127 programs built from 124 templates, and this PR leaves both counts unchanged. Most programs are BF16-operand GEMMs (forward, dgrad and wgrad), and one is an FP32 router GEMM. The PR changes 3 row rules, all forsm_103a, and each applies at a single token count T. It adds one rule for the 5120→17408 weight gradient at T 16231. The other two are the emptysm_103akeys for the 17408→5120 weight gradient at T 16231 and 16384. The previous PR added those keys to keep that row's plan unchanged, and this PR gives them a real rule. All three rules route BF16-output weight-gradient rows to a program that already ships: the half-tail program with a TMA-store epilogue and 12-row raster groups. No program or template is added or removed, the rule count goes from 366 to 367, andsm_100aandsm_107aare unchanged.The baseline is the previous Cake version of the package on main. Against it, the changed rows have a speedup of 1.013 on GB300 for all three rows and 1.042–1.045 on B300. No changed row is slower on either GPU, and outputs on those rows are bitwise identical to main. All other rows of the 294-row shape list plan the same programs as main.
Speedup of this PR over the previous Cake version on main. GB300 (
sm_103a, 152 SMs), B300 (sm_103a, 148 SMs); CUDA 13.4, cold L2, BF16 output. Speedup = previous time / this PR time, and values above 1 mean this PR is faster.The package also ships FP32-output forms, weight-gradient (wgrad) programs and the FP32 router GEMM (run through BF16x3 emulation), on
sm_100a,sm_103aandsm_107a.Summary by CodeRabbit