build(jit): reduce JIT-cache wheel size - #4757
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bkryu merged 4 commits intoAug 27, 2026
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Drop SM75 from the cu134 wheel targets and enable nvcc's size-optimized fatbin compression for all CUDA JIT builds.
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August 26, 2026 21:48
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No actionable comments were generated in the recent review. 🎉 ℹ️ Recent review info⚙️ Run configurationConfiguration used: defaults Review profile: CHILL Plan: Pro Plus Run ID: 📒 Files selected for processing (2)
Included review availability: Your plan provides up to 8 included reviews per hour; 4 remain after this review. 📝 WalkthroughWalkthroughThe JIT compiler now enables size-optimized fatbin compression. A test verifies the generated NVCC flags. CUDA 12.9, 13.0, and 13.4 cache architecture lists remove compute capability 7.5. CUDA 13.0 and 13.4 aarch64 lists also remove 12.1a. ChangesJIT updates
Estimated code review effort: 2 (Simple) | ~10 minutes Merge Risk: 🟡 Moderate · up to The PR removes SM121a from the CUDA 13.0 and 13.4 AArch64 JIT-cache lists while the release workflow still requires that target, creating a risk of omitted artifacts or release validation failure; merge should wait for the configuration to be aligned or explicitly accepted by the release owner. Suggested reviewers: 🚥 Pre-merge checks | ✅ 4 | ❌ 1❌ Failed checks (1 warning)
✅ Passed checks (4 passed)
Full details: Docstring CoverageExplanation Docstring coverage is 0.00% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 4 functions across 2 files. (2 skipped: 2 unsupported.)
✨ Finishing Touches 💡 1🛠️ Fix failing CI checks 💡
🧪 Generate unit tests (beta)
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Extend the SM75 removal to the cu129 and cu130 x86_64 and AArch64 JIT-cache targets.
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@flashinfer-bot run |
Remove SM121a from the cu130 and cu134 AArch64 JIT-cache architecture lists.
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In `@ci/cuda-versions.json`:
- Line 41: Restore the 12.1a target in the aarch64_arch_list entries for both
cu130 and cu134, preserving the CUDA 13.x release policy required by the release
workflow.
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ci/cuda-versions.json
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@flashinfer-bot run |
Replace the stale SM121a retention notes with the centralized size-constrained architecture policy used by both release workflows.
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@flashinfer-bot run |
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/bot run tests/jit |
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4 tasks
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[SUCCESS] Pipeline #64758784: 16/16 executed test jobs passed |
bkryu
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Aug 27, 2026
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aleozlx
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Sep 10, 2026
## 📌 Description This PR turns `flashinfer-jit-cache` into a small top-level shim backed by independently installable, architecture-specific provider wheels. It retains legacy monolithic cache discovery as a fallback while adding: - provider package metadata and entry-point discovery - exact CUDA architecture matching, including suffixed targets such as `sm90a`, `sm120f`, and `sm121a` - a default installation mode whose shim dependencies name the complete published provider set - a minimal installation mode that selects only an explicitly requested or locally detected provider, with no implicit SM80 baseline - provider wheelhouse build, binary inventory, installation, and JIT-disabled GPU smoke tooling - AOT capability gating so unsupported modules, currently BGMV MoE on SM80, are omitted from that provider rather than failing its build The provider matrix is intentionally independent of the size-pruned monolithic wheel matrix. Architecture-specific wheels may therefore preserve useful native targets such as SM121a without adding them back to every monolithic wheel. Native providers are SASS-only; the shim does not rely on PTX or an SM80 compatibility baseline. ## 🔍 Related Issues - Follow-up design to #3265 - Incorporates current-main behavior from #4469, #4527, #4682, #4711, #4757, and #4760 ## 🧪 Validation ### Provider canaries Two end-to-end CUDA 13.0 canaries have exercised provider build, strict binary inspection, shim/provider installation, provider discovery, top-level import without CUTLASS DSL, and a JIT-disabled `silu_and_mul` numerical smoke: | System | Target | Provider result | | --- | --- | --- | | x86_64 A100 test system | A100 / SM80 | 113.8 MiB; every CUDA-bearing module SM80-only; zero PTX | | DGX Spark | aarch64 GB10 / SM121a | 173.0 MiB; 558 modules; every CUDA-bearing module SM121a-only; zero PTX | The x86_64 A100 artifact was built before the final BGMV capability correction and contained 207 modules. Final-branch source-level SM80 AOT enumeration produces 206 modules with `bgmv_moe` absent, and the associated focused suite passed 30 tests. A final-head SM80 provider wheel still needs to be rebuilt to confirm that exact packaged inventory. The Spark provider could load its packaged BGMV module, but a BGMV numerical invocation exceeded the device's dynamic shared-memory limit (approximately 216 KiB requested versus approximately 101 KiB available). That is a pre-existing kernel/runtime limitation and is outside this packaging change; the independent `silu_and_mul` provider smoke passed. ### Current branch and CI - CodeRabbit passes and all inline review threads are resolved. - Pre-commit, documentation, and public API/documentation checks pass. - The existing monolithic release workflow passes for cu129, cu130, and cu134 on both x86_64 and aarch64. These jobs validate backward compatibility, not provider-wheel publication. - The manually authorized [full PR test run](https://github.com/flashinfer-ai/flashinfer/actions/runs/33890607699) passes all four cu129/cu130 x64/arm64 AOT build-import jobs, all five A10G JIT shards, and the T4 JIT job. The H100 JIT job is still running as of September 4, 2026. - After the latest review fixes, the focused provider suite passed on an x86_64 A100 test system in a disposable container: 25 passed, 1 warning. `pre-commit`, `bash -n`, and `git diff --check` also pass. The branch is currently mergeable. It will be rebased onto `main` once more before merge; intervening main-branch changes reviewed so far do not alter the provider packaging or AOT capability implementation. ## Remaining Validation Before enabling provider publication in a release workflow: - let the current H100 PR test finish and address any real failure - rebuild the final-head SM80 provider and repeat strict inventory, install, and GPU smoke validation - build and inspect a real cu134 provider artifact; current cu134 CI covers only the legacy wheel and static configuration paths - validate default all-provider installation plus minimal auto-detected and explicit-target installation against a multi-provider wheelhouse - teach `scripts/update_whl_index.py` to recognize provider distribution names - add an artifact-only shadow provider matrix to nightly/release automation and collect size, build-time, homogeneous GPU, and heterogeneous GPU results before changing the public release format ## Reviewer Notes The main policy question is the explicit provider coverage matrix for each CUDA and CPU architecture. The current implementation makes the conservative choices: exact target matching, literal shim dependencies, no closest-lower-architecture inference, no implicit SM80 provider, and normal JIT compilation when no compatible AOT provider is available. This is ready for human review of the package contract, installation UX, and release shape. The remaining items above are release-enablement validation rather than evidence that the architectural split itself has not been exercised. ## 🚀 Pull Request Checklist Thank you for contributing to FlashInfer! Before we review your pull request, please make sure the following items are complete. ### ✅ Pre-commit Checks - [ ] I have installed `pre-commit` by running `pip install pre-commit` (or used your preferred method). - [ ] I have installed the hooks with `pre-commit install`. - [ ] I have run the hooks manually with `pre-commit run --all-files` and fixed any reported issues. > If you are unsure about how to set up `pre-commit`, see [the pre-commit documentation](https://pre-commit.com/). ## 🧪 Tests - [x] Tests have been added or updated as needed. - [ ] All tests are passing (`unittest`, etc.). <!-- This is an auto-generated comment: release notes by coderabbit.ai --> ## Summary by CodeRabbit * **New Features** * Added experimental architecture-specific JIT-cache provider wheels with automatic discovery and legacy fallback. * Added `install-jit-cache-wheel` options for full or minimal installation and CUDA architecture selection. * Added tools to build, validate, and smoke-test provider packages. * **Bug Fixes** * Improved architecture-aware AOT module selection and generation. * Prevented incompatible architectures from being selected automatically. * **Documentation** * Documented provider-wheel configuration, installation modes, and experimental build options. <!-- end of auto-generated comment: release notes by coderabbit.ai -->
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📌 Description
Reduce JIT-cache wheel size by:
The latest cu134 AArch64 nightly wheel measured 2,382,841,917 bytes, which is 235,358,269 bytes over the GitHub 2 GiB release-asset limit. SM75 accounted for an estimated 125,281,650 bytes of that wheel, and a representative CUDA 13.4 cubin sample was 17.6% smaller with size mode than with the current default compression mode. Removing SM121a provides additional headroom. The release workflow will provide the exact end-to-end measurement.
🔍 Related Issues
None.
🚀 Pull Request Checklist
Thank you for contributing to FlashInfer! Before we review your pull request, please make sure the following items are complete.
✅ Pre-commit Checks
🧪 Tests
Validation performed:
The local Python 3.14 environment does not include pytest, so the focused unit test was not executed locally. The CUDA wheel size and compatibility require release CI validation.
Reviewer Notes
Please confirm the CUDA driver compatibility expectation for applying --compress-mode=size to every supported CUDA version. The current JIT-cache matrix begins at CUDA 12.9, newer than the CUDA 12.4 driver support boundary for compressed fatbins.
Summary by CodeRabbit
Performance
Compatibility
Tests