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Included review availability: Your plan provides up to 8 included reviews per hour; 6 remain after this review. 📝 WalkthroughWalkthroughPaged KV-cache execution now supports equal and independent K/V strides. CUDA kernels, JIT modules, runtime wrappers, and POD paths route each stride layout to the matching implementation. Regression tests cover routing, caching, CUDA graphs, and compilation guards. ChangesPaged KV stride routing
Priority: ➖ Normal Estimated code review effort: 4 (Complex) | ~60 minutes Change: Bug fix Sequence Diagram(s)sequenceDiagram
participant Wrapper
participant paged_run
participant LazyIndependentModule
participant PagedKernel
Wrapper->>paged_run: Execute with K/V cache tensors
paged_run->>paged_run: Compare K/V strides
paged_run->>LazyIndependentModule: Load independent variant when strides differ
LazyIndependentModule->>PagedKernel: Launch independent-stride kernel
PagedKernel->>Wrapper: Return attention output
Merge Risk: ⚪ Minimal · up to The reviewed change has no identified merge-blocking risk. 🚥 Pre-merge checks | ✅ 4 | ❌ 1❌ Failed checks (1 warning)
✅ Passed checks (4 passed)
✨ Finishing Touches 💡 2📝 Generate docstrings 💡
🛠️ Fix failing CI checks 💡
🧪 Generate unit tests (beta)
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/bot run tests/attention |
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Local A/B on the build-size tradeoff I reproduced the artifact cost locally: took
The relative increase was similar in my four-architecture build (2,788,992 → 5,006,696 B, +79.5%), suggesting that the cost compounds across the release wheels' multi-architecture fatbins (currently 6–7 architecture targets depending on CUDA/platform). Linking and wheel compression may change the final ratio. This is consistent with the +26.9% / +33.2% in the reviewer notes—the growth is concentrated in the paged TUs (~+78%), while the aggregate figures are diluted by unchanged TUs. Two observations from
Since the specialization duplication applies to every paged TU that ships in the wheel—and was ~78% for the configuration measured here—could you run an A/B build of |
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[SUCCESS] Pipeline #64966253: 16/16 executed test jobs passed |
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Updated the implementation to ship equal-K/V-stride FA2 primaries in the default cache and lazily load a separate paged-only module for unequal strides. The complete cu130 x86_64 wheel is now 1.20% smaller than the PR base, replacing the previous 15.10% increase; the B300 correctness and performance acceptance checks passed. The tradeoff is first-use latency: a cold unequal-stride configuration took 18.35–21.15 seconds to JIT compile/load in testing. Prewarm during initialization (and before CUDA-graph capture) to keep this out of request latency; subsequent calls reuse the module. Unequal layouts require JIT when no compatible cached artifact is available, and fail clearly with JIT disabled. The optional precompiled supplement is deferred. |
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Inline comments:
In `@tests/attention/test_batch_prefill_kernels.py`:
- Line 476: Update the fixed_split_size value in the test setup so the enabled
split-KV case uses 2 instead of 64, producing multiple chunks for each
seven-page request while preserving None when disable_split_kv is true.
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csrc/batch_pod.cucsrc/batch_prefill.cucsrc/batch_prefill_customize_config.jinjacsrc/batch_prefill_paged.cucsrc/batch_prefill_paged.cuhcsrc/batch_prefill_paged_jit_binding.cucsrc/batch_prefill_paged_kernel_inst.jinjacsrc/pod.cuflashinfer/aot.pyflashinfer/attention/_core.pyflashinfer/cascade.pyflashinfer/decode.pyflashinfer/jit/attention/modules.pyflashinfer/prefill.pytests/attention/test_batch_prefill_kernels.pytests/attention/test_block_sparse.pytests/attention/test_shared_prefix_kernels.pytests/attention/test_tensor_cores_decode.pytests/jit/test_attention_utils.pytests/jit/test_batch_prefill_lazy_loader.pytests/test_helpers/paged_kv.pytests/trace/test_batch_pod_run_reference_correctness.pytests/trace/test_pod_with_paged_kv_cache_run_reference_correctness.pytests/trace/test_var_block_sparse_run_reference_correctness.py
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| def prewarm_paged_kv_stride_variant(self, variant: str = "independent") -> None: |
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Actionable comments posted: 1
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Inline comments:
In `@flashinfer/prefill.py`:
- Around line 2848-2853: Add a Parameters section documenting the variant : str
argument to BatchPrefillWithPagedKVCacheWrapper.prewarm_paged_kv_stride_variant
in flashinfer/prefill.py lines 2848-2853 and
BatchDecodeWithPagedKVCacheWrapper.prewarm_paged_kv_stride_variant in
flashinfer/decode.py lines 2048-2055, preserving each method’s existing
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[FAILED] Pipeline #67320202 — 6/19 executed test jobs passed Compared with nightly #67144516 (different CI configuration). Unit Tests
✅ Pass · 🟡 Old failure · ❌ New failure · ⏱ Test timeout · Multi-GPU and Multi-Node Tests — 6/6 passed
Failure detailsPR-related regressions
New relative to nightly (attribution uncertain)
Pre-existing failures
Timeouts, infrastructure, or incomplete jobs
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I arrived at the same root cause independently in #5071 and am closing that in favour of this PR — your approach keeps the unequal-stride capability that #3684 shipped in 0.6.18, and the module split answers the JIT-cache concern you raised earlier. Three things from my side that may be worth folding in. 1. #3684 doubled the offset array in two places. This PR fixes plus a second If you do extend to it, there is a trap. 2. Offer: B300 perf numbers. This PR has correctness coverage but no before/after. I measured on B300 (SM103, CUDA 13.0) using NVBug 6634590's own repro command —
i.e. the bisect is confirmed and the fix returns main to the pre-#3684 baseline. Since our kernel-side edits are equivalent, these should carry over — happy to re-run on your head if that is more useful than quoting mine. 3. NVBug 6634592 (prefill) is unmeasured by both PRs. Both are marked as fixing 6634590 and 6634592, but the only numbers either of us has are for Note the board is not urgent: both NVBugs' first-bad commit |
PR Review ScreeningCI verdict: ✅ auto-run ok Security
Packaging
Presentation
Implementation
Experimental track
Notes for the maintainer
Generated by flashinfer-pr-screen · rubric: docs/code_review_guidance.md · not a code review · AI screening can make mistakes — a maintainer's judgment supersedes this report. |
Pass stride mode and module surface through the cached custom prefill adapter. Add coverage for legacy defaults and explicit specialization, and pin the FA2 shared-prefix router test to its intended backend.
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/bot run tests/attention/test_attention_sink.py tests/attention/test_shared_prefix_kernels.py tests/jit/test_attention_utils.py tests/jit/test_batch_prefill_lazy_loader.py |
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[CANCELING] Pipeline #67445777: canceled |
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/bot run tests/attention/test_attention_sink.py tests/attention/test_shared_prefix_kernels.py tests/jit/test_attention_utils.py tests/jit/test_batch_prefill_lazy_loader.py |
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Performance measurements show that performance has recovered to pre-regression numbers:
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[SUCCESS] Pipeline #67459974: 18/19 executed test jobs passed |
## 📌 Description Paged FA2 currently computes and stores independent V offsets even when K and V have identical strides. That extra address-generation work regresses common equal-stride paged decode and prefill workloads. This change: - checks the relevant K/V strides once during host dispatch and selects a compile-time `SAME_KV_STRIDES` specialization; - reuses the K offsets for V in the equal-stride specialization; - preserves independent V offsets for unequal-stride layouts, including asymmetric NVFP4; and - adds focused coverage to the existing tensor-core decode, batch prefill, and JIT generator suites. The stride comparison is host-side dispatch work. It does not add a per-element branch to the GPU kernel. ## 🔍 Related Issues https://nvbugspro.nvidia.com/bug/6634590 https://nvbugspro.nvidia.com/bug/6634592 ## 🚀 Pull Request Checklist Thank you for contributing to FlashInfer! Before we review your pull request, please make sure the following items are complete. ### ✅ Pre-commit Checks - [x] I have installed `pre-commit` by running `pip install pre-commit` (or used your preferred method). - [x] I have installed the hooks with `pre-commit install`. - [x] I have run the hooks manually with `pre-commit run --all-files` and fixed any reported issues. > If you are unsure about how to set up `pre-commit`, see [the pre-commit documentation](https://pre-commit.com/). ## 🧪 Tests - [x] Tests have been added or updated as needed. - [ ] All tests are passing (`unittest`, etc.). Full repository CI is pending; the focused validation below passed. Focused validation on B300/SM103: - JIT specialization test: 1 passed. - Equal-stride tensor-core decode and paged prefill correctness tests: 2 passed. - Reference-checked acceptance matrix: | Workload | Target backend | Median | Gate | | --- | --- | ---: | ---: | | Llama-4 Scout | `fa2_tc` | 0.334 ms | ≤ 0.3675 ms | | Llama-3.1 70B | `fa2_tc` | 0.336 ms | ≤ 0.3675 ms | | GPT-OSS | `fa2` | 1.355 ms | ≤ 1.446 ms | All matrix cases returned zero with reference checking enabled and no mismatch diagnostics. CUPTI was unavailable, so benchmark timing used CUDA events. Unsupported control backends were skipped. ## Reviewer Notes The extra compile-time specialization increases generated build artifacts. Qualification measured approximately +26.9% aggregate object bytes and +33.2% shared-library bytes, with unchanged generated source/module counts. This is the main tradeoff for recovering the equal-stride runtime performance. POD and batch-POD callers retain the conservative independent-stride default unless they explicitly select the new specialization. <!-- This is an auto-generated comment: release notes by coderabbit.ai --> ## Summary by CodeRabbit - **New Features** - Added support for paged key/value caches with independent memory layouts and strides. - Added automatic routing between matching- and independent-stride execution paths. - Added lazy loading and optional prewarming of stride-specific variants before CUDA graph capture. - Extended support across batch prefill, decode, cascade, shared-prefix, POD, and block-sparse workflows. - **Bug Fixes** - Improved correctness for bfloat16 paged prefill and tensor-core decoding, including grouped query attention. - **Tests** - Added coverage for routing, reuse, CUDA graphs, compilation, and reference-output correctness. <!-- end of auto-generated comment: release notes by coderabbit.ai --> (cherry picked from commit db0cdc2)
…4736) ## 📌 Description Paged FA2 currently computes and stores independent V offsets even when K and V have identical strides. That extra address-generation work regresses common equal-stride paged decode and prefill workloads. This change: - checks the relevant K/V strides once during host dispatch and selects a compile-time `SAME_KV_STRIDES` specialization; - reuses the K offsets for V in the equal-stride specialization; - preserves independent V offsets for unequal-stride layouts, including asymmetric NVFP4; and - adds focused coverage to the existing tensor-core decode, batch prefill, and JIT generator suites. The stride comparison is host-side dispatch work. It does not add a per-element branch to the GPU kernel. ## 🔍 Related Issues https://nvbugspro.nvidia.com/bug/6634590 https://nvbugspro.nvidia.com/bug/6634592 ## 🚀 Pull Request Checklist Thank you for contributing to FlashInfer! Before we review your pull request, please make sure the following items are complete. ### ✅ Pre-commit Checks - [x] I have installed `pre-commit` by running `pip install pre-commit` (or used your preferred method). - [x] I have installed the hooks with `pre-commit install`. - [x] I have run the hooks manually with `pre-commit run --all-files` and fixed any reported issues. > If you are unsure about how to set up `pre-commit`, see [the pre-commit documentation](https://pre-commit.com/). ## 🧪 Tests - [x] Tests have been added or updated as needed. - [ ] All tests are passing (`unittest`, etc.). Full repository CI is pending; the focused validation below passed. Focused validation on B300/SM103: - JIT specialization test: 1 passed. - Equal-stride tensor-core decode and paged prefill correctness tests: 2 passed. - Reference-checked acceptance matrix: | Workload | Target backend | Median | Gate | | --- | --- | ---: | ---: | | Llama-4 Scout | `fa2_tc` | 0.334 ms | ≤ 0.3675 ms | | Llama-3.1 70B | `fa2_tc` | 0.336 ms | ≤ 0.3675 ms | | GPT-OSS | `fa2` | 1.355 ms | ≤ 1.446 ms | All matrix cases returned zero with reference checking enabled and no mismatch diagnostics. CUPTI was unavailable, so benchmark timing used CUDA events. Unsupported control backends were skipped. ## Reviewer Notes The extra compile-time specialization increases generated build artifacts. Qualification measured approximately +26.9% aggregate object bytes and +33.2% shared-library bytes, with unchanged generated source/module counts. This is the main tradeoff for recovering the equal-stride runtime performance. POD and batch-POD callers retain the conservative independent-stride default unless they explicitly select the new specialization. <!-- This is an auto-generated comment: release notes by coderabbit.ai --> ## Summary by CodeRabbit - **New Features** - Added support for paged key/value caches with independent memory layouts and strides. - Added automatic routing between matching- and independent-stride execution paths. - Added lazy loading and optional prewarming of stride-specific variants before CUDA graph capture. - Extended support across batch prefill, decode, cascade, shared-prefix, POD, and block-sparse workflows. - **Bug Fixes** - Improved correctness for bfloat16 paged prefill and tensor-core decoding, including grouped query attention. - **Tests** - Added coverage for routing, reuse, CUDA graphs, compilation, and reference-output correctness. <!-- end of auto-generated comment: release notes by coderabbit.ai -->
4 participants
📌 Description
Paged FA2 currently computes and stores independent V offsets even when K and V have identical strides. That extra address-generation work regresses common equal-stride paged decode and prefill workloads.
This change:
SAME_KV_STRIDESspecialization;The stride comparison is host-side dispatch work. It does not add a per-element branch to the GPU kernel.
🔍 Related Issues
https://nvbugspro.nvidia.com/bug/6634590
https://nvbugspro.nvidia.com/bug/6634592
🚀 Pull Request Checklist
Thank you for contributing to FlashInfer! Before we review your pull request, please make sure the following items are complete.
✅ Pre-commit Checks
pre-commitby runningpip install pre-commit(or used your preferred method).pre-commit install.pre-commit run --all-filesand fixed any reported issues.🧪 Tests
unittest, etc.). Full repository CI is pending; the focused validation below passed.Focused validation on B300/SM103:
fa2_tcfa2_tcfa2All matrix cases returned zero with reference checking enabled and no mismatch diagnostics. CUPTI was unavailable, so benchmark timing used CUDA events. Unsupported control backends were skipped.
Reviewer Notes
The extra compile-time specialization increases generated build artifacts. Qualification measured approximately +26.9% aggregate object bytes and +33.2% shared-library bytes, with unchanged generated source/module counts. This is the main tradeoff for recovering the equal-stride runtime performance.
POD and batch-POD callers retain the conservative independent-stride default unless they explicitly select the new specialization.
Summary by CodeRabbit
New Features
Bug Fixes
Tests