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feat: MNNVL Allreduce quant fusion and performance optimization #3385
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Merged
aleozlx
merged 15 commits into
flashinfer-ai:main
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timlee0212:shili/mnnvl-allreduce-opts
May 26, 2026
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2c5e234
Port latcomm AllReduce optimizations to trtllm_mnnvl_allreduce
153da02
Use rank-stable reduction order in MNNVL allreduce
a42d411
Staging optimizations.
timlee0212 c8cc740
Staging optimizations: cga barrier, ts fusion.
timlee0212 0789210
Revert to separate kernels for 2-shot
timlee0212 2ea7f2e
Clean up; Use JIT CUDA Arch guard.
timlee0212 0f2e0fc
Simplify the grid dispatch logic and add comments.
timlee0212 bc65908
Fix pre-commit error.
timlee0212 99b1ec7
Add FP8/NVFP4 quant fusion
timlee0212 4a64aae
Add fallback reduction order; Update docstrings.
timlee0212 7b4402e
Fix scale factor padding check.
timlee0212 c9eed29
Revert lamport polling behavior
timlee0212 1246cc5
Address review comment
timlee0212 a30023f
Use fast path + determinisitic reduction order.
timlee0212 6a384bf
Chunked reduction to avoid register spilling.
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