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Adding "Production Host Setup Recommendations" doc
Signed-off-by: Ram Sripracha <[email protected]>
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# Production Host Setup Recommendations | ||
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## Host Security Configuration | ||
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### Mitigating Side-Channel Issues | ||
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When deploying Firecracker microVMs to handle multi-tenant workloads, the | ||
following host environment configurations are strongly recommended to guard | ||
against side-channel security issues. | ||
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#### Disable Simultaneous Multithreading (SMT) | ||
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Disabling SMT will help mitigate side-channels issues between sibling | ||
threads on the same physical core. | ||
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SMT can be disabled by adding the following Kernel boot parameter to the host: | ||
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``` | ||
nosmt=force | ||
```` | ||
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Verification can be done by running: | ||
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```bash | ||
(grep -q "^forceoff$\|^notsupported$" /sys/devices/system/cpu/smt/control && echo "Hyperthreading: DISABLED") || echo "Hyperthreading: ENABLED" | ||
``` | ||
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#### Check Kernel Page-Table Isolation (KPTI) support | ||
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KPTI is used to prevent certain side-channel issues that allow access to | ||
protected kernel memory pages that are normally inaccessible to guests. Some | ||
variants of Meltdown can be mitigated by enabling this feature. | ||
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Verification can be done by running: | ||
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```bash | ||
(grep -q "^Mitigation: PTI$" /sys/devices/system/cpu/vulnerabilities/meltdown && echo "KPTI: SUPPORTED") || echo "KPTI: NOT SUPPORTED" | ||
``` | ||
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#### Disable Kernel Same-page Merging (KSM) | ||
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Disabling KSM mitigates side-channel issues which rely on de-duplication to | ||
reveal what memory line was accessed by another process. | ||
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KSM can be disabled by executing the following as root: | ||
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``` | ||
echo "0" > /sys/kernel/mm/ksm/run | ||
``` | ||
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Verification can be done by running: | ||
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```bash | ||
(grep -q "^0$" /sys/kernel/mm/ksm/run && echo "KSM: DISABLED") || echo "KSM: ENABLED" | ||
``` | ||
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#### Check for speculative branch prediction issue mitigation | ||
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Use a kernel compiled with retpoline and run on hardware with microcode | ||
supporting Indirect Branch Prediction Barriers (IBPB) and Indirect Branch | ||
Restricted Speculation (IBRS). | ||
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These features provide side-channel mitigation for variants of Spectre such | ||
as the Branch Target Injection variant. | ||
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Verification can be done by running: | ||
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```bash | ||
(grep -q "^Mitigation: Full generic retpoline, IBPB, IBRS_FW$" /sys/devices/system/cpu/vulnerabilities/spectre_v2 && echo "retpoline, IBPB, IBRS: ENABLED") || echo "retpoline, IBPB, IBRS: DISABLED" | ||
``` | ||
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#### Apply L1 Terminal Fault (L1TF) mitigation | ||
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These features provide mitigation for Foreshadow/L1TF side-channel issue on | ||
affected hardware. | ||
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They can be enabled by adding the following Linux kernel boot parameter: | ||
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``` | ||
l1tf=full,force | ||
``` | ||
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which will also implicitly disable SMT. This will apply the mitigation when | ||
execution context switches into microVMs. | ||
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Verification can be done by running: | ||
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```bash | ||
declare -a CONDITIONS=("Mitigation: PTE Inversion" "VMX: cache flushes") | ||
for cond in "${CONDITIONS[@]}"; do (grep -q "$cond" /sys/devices/system/cpu/vulnerabilities/l1tf && echo "$cond: ENABLED") || echo "$cond: DISABLED"; done | ||
``` | ||
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#### Apply Speculative Store Bypass (SSBD) mitigation | ||
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This will mitigate variants of Spectre side-channel issues such as | ||
Speculative Store Bypass and SpectreNG. | ||
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It can be enabled by adding the following Linux kernel boot parameter: | ||
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``` | ||
spec_store_bypass_disable=seccomp | ||
``` | ||
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which will apply SSB if seccomp is enabled by Firecracker's jailer. | ||
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Verification can be done by running: | ||
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```bash | ||
cat /proc/*PID*/status | grep Speculation_Store_Bypass | ||
``` | ||
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where *PID* is the process ID being check. Output shows one of the | ||
following: | ||
- not vulnerable | ||
- thread mitigated | ||
- thread force mitigated | ||
- globally mitigated | ||
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#### Use memory with Rowhammer mitigation support | ||
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Rowhammer is a memory side-channel issue that can lead to unauthorized cross- | ||
process memory changes. | ||
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Using DDR4 memory that supports Target Row Refresh (TRR) with error-correcting | ||
code (ECC) is recommended. Use of pseudo target row refresh (pTRR) for systems | ||
with pTRR-compliant DDR3 memory can help mitigate the issue, but it also | ||
incurs a performance penalty. | ||
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#### Disable swapping to disk or enable secure swap | ||
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Memory pressure on a host can cause memory to be written to drive storage when | ||
swapping is enabled. Disabling swap mitigates data remanence issues related to | ||
having guest memory contents on microVM storage devices. | ||
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Verify that swap is disabled by running: | ||
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```bash | ||
cat /proc/swaps | ||
``` | ||
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The output should not show any swap partition. |