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Reorder and align LRUCacheShard data members to reduce false sharing #2568

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2 changes: 1 addition & 1 deletion cache/lru_cache.h
Original file line number Diff line number Diff line change
Expand Up @@ -156,7 +156,7 @@ class LRUHandleTable {
};

// A single shard of sharded cache.
class alignas(CACHE_LINE_SIZE) LRUCacheShard : public CacheShard {
class ALIGN_AS(CACHE_LINE_SIZE) LRUCacheShard : public CacheShard {
public:
LRUCacheShard();
virtual ~LRUCacheShard();
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2 changes: 2 additions & 0 deletions port/port_posix.h
Original file line number Diff line number Diff line change
Expand Up @@ -189,6 +189,8 @@ extern void InitOnce(OnceType* once, void (*initializer)());
#define CACHE_LINE_SIZE 64U
#endif

#define ALIGN_AS(n) alignas(n)

#define PREFETCH(addr, rw, locality) __builtin_prefetch(addr, rw, locality)

extern void Crash(const std::string& srcfile, int srcline);
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2 changes: 2 additions & 0 deletions port/win/port_win.h
Original file line number Diff line number Diff line change
Expand Up @@ -241,6 +241,8 @@ extern void InitOnce(OnceType* once, void (*initializer)());
#define CACHE_LINE_SIZE 64U
#endif

#define ALIGN_AS(n)

static inline void AsmVolatilePause() {
#if defined(_M_IX86) || defined(_M_X64)
YieldProcessor();
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