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Add picorv32 support for Alhambra board #32
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If picorv32 core can use the same gcc that works for our f32c-rv32
and approximately have the SOC (mmaped io, leds, spi, timers)
also same or similar to f32c soc and are mapped preferrably
to the same memory addresses then I'd be happy to add
some board names, strings and compiler options to boards.txt
and/or platform.txt
Can somebody try our rv32 binaries on picorv32 and
report if they work at least to make a led blinky?
…On 10/22/18, drtrigon ***@***.***> wrote:
According to YosysHQ/picorv32#92 picorv32
RISC soft core runs on Alhambra board. Is it possible to add support for
this to FPGArduino?
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#32
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I try to help with whatever I can. The toolchain I used successfully is "RISC-V GNU toolchain and libraries for a pure RV32I target" as mentioned in https://github.com/cliffordwolf/picorv32#building-a-pure-rv32i-toolchain. It uses |
Can you try to use our f32c-rv32 compiled binary to get LED blinky on picorv32?
In the meantime I probably should get picorv32 for ulx3s, I think it's already
done at prjtrellis but haven't tried to download and compile
I'm currently busy with new boards ULX3S and some hardware support around
it
…On 10/23/18, drtrigon ***@***.***> wrote:
I try to help with whatever I can. The toolchain I used successfully is
"RISC-V GNU toolchain and libraries for a pure RV32I target" as mentioned in
https://github.com/cliffordwolf/picorv32#building-a-pure-rv32i-toolchain. It
uses `riscv32-unknown-elf-gcc`, `riscv32-unknown-elf-objcopy` and from
icestorm/icestudio toolchain `iceprog`.
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I tried, but not with much success... I used code from a working project and just tried to replace the toolchain with yours, see attached Makefile.txt (the commented parts are the ones from the working toolchain for reference). Running it results in (the .elf file has a size of 0 bytes):
So my questions:
|
Aiieeee segmentation fault in riscv linker :)
Our riscv support is obviously not too functional
no more testing from you needed, we must
refresh this riscv support.
Maybe better for alhambra board is to use another
more stable riscv toolchain that you know works for your hardware
It is no problem for integrate from licensing point of view but
we lack of ing-hours to assemble all parts into stuff that works.
I can package another riscv compiler and all required programming
tools and libs, if you succeed with anything that leads to a blink led
…On 10/26/18, drtrigon ***@***.***> wrote:
> Can you try to use our f32c-rv32 compiled binary to get LED blinky on
> picorv32?
I tried, but not with much success... I used code from a working project and
just tried to replace the toolchain with yours, see attached
[Makefile.txt](https://github.com/f32c/arduino/files/2520503/Makefile.txt)
(the commented parts are the ones from the working toolchain for
reference).
Running it results in (the .elf file has a size of 0 bytes):
> $ make prog
../../fpgarduino/f32c/bin/riscv-elf-gcc -std=gnu11 -DHX8KDEMO -march=RV32I
-Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o
firmware.elf start.s firmware.c
collect2: error: ld terminated with signal 11 [Segmentation fault], core
dumped
$HOME/Downloads/icestudio/fpgarduino/f32c/bin/../lib/gcc/riscv-elf/4.9.2/../../../../riscv-elf/bin/ld:
/tmp/cc4XMh7D.o: ABI is incompatible with that of the selected emulation
$HOME/Downloads/icestudio/fpgarduino/f32c/bin/../lib/gcc/riscv-elf/4.9.2/../../../../riscv-elf/bin/ld:
failed to merge target specific data of file /tmp/cc4XMh7D.o
$HOME/Downloads/icestudio/fpgarduino/f32c/bin/../lib/gcc/riscv-elf/4.9.2/../../../../riscv-elf/bin/ld:
/tmp/cc39QdcM.o: ABI is incompatible with that of the selected emulation
$HOME/Downloads/icestudio/fpgarduino/f32c/bin/../lib/gcc/riscv-elf/4.9.2/../../../../riscv-elf/bin/ld:
failed to merge target specific data of file /tmp/cc39QdcM.o
make: *** [firmware.elf] Fehler 1
So my questions:
- Can you be more specific what I should test exactly (source files,
commands for compiling, etc.)?
- Would it be possible to integrate the picorv32 icestorm/icestudio
toolchain as it is open source too (e.g. the programmer could be needed)?
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Our current riscv toolchain is exactly the same as the mips version, i.e. is gcc-7.2 based and should be perfectly fine. The question is why the OP has fetched the long obsoleted 4.9.2 toolchain - could that be a bug in our Arduino json / packaging? |
Yes, that's true we should package 7.2 into arduino....
…On 10/27/18, Marko Zec ***@***.***> wrote:
Our current riscv toolchain is exactly the same as the mips version, i.e. is
gcc-7.2 based and should be perfectly fine. The question is why the OP has
fetched the long obsoleted 4.9.2 toolchain - could that be a bug in our
Arduino json / packaging?
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How did that regression happen? I thought we already switched over to 7.2 a year ago, and were using gcc-6 based toolchains prior to that. The bm/package_fpga_index.json is clearly referencing 7.2 based toolchains. I'm inclined to wipe out all the pre-7.2 .zip archives from the web, otherwise we'll be getting into this again and again... |
There were no regression, we only upgraded mips to 7.2
and riscv 7.2 I forgot :)
…On 10/27/18, Marko Zec ***@***.***> wrote:
How did that regression happen? I thought we already switched over to 7.2 a
year ago, and were using gcc-6 based toolchains prior to that. The
bm/package_fpga_index.json is clearly referencing 7.2 based toolchains.
I'm inclined to wipe out all the pre-7.2 .zip archives from the web,
otherwise we'll be getting into this again and again...
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How's that possible? There's a single integrated toolchain archive for both mips + riscv toolchains per OS/architecture (win32, osx, lin32, lin64)? I.e. they are not downloaded separately, and there's no way to separate them in the json? |
I removed the pre gcc-7.2 toolchains from the bm on our website as a precaution for this to reocur. |
If zip toolchain is just removed this from bm installation directory without
any other fix, fpgarduino board manager will no longer be installable
effectively breaking everything :)
…On 10/27/18, Marko Zec ***@***.***> wrote:
I removed the pre gcc-7.2 toolchains from the bm on our website as a
precaution for this to reocur.
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When I look better, we should have 7.2 toolchain for both mips+riscv
in boards manager for bsd linux win osx
so gcc 4.9 probably remained from some old installation?
…On 10/27/18, The EMARD ***@***.***> wrote:
If zip toolchain is just removed this from bm installation directory
without
any other fix, fpgarduino board manager will no longer be installable
effectively breaking everything :)
On 10/27/18, Marko Zec ***@***.***> wrote:
> I removed the pre gcc-7.2 toolchains from the bm on our website as a
> precaution for this to reocur.
>
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> #32 (comment)
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OK I found it
linux 32-bit is really old toolchain from 2015 because Marko provided
only linux-64 bit 7.2
and I had no better idea than to keep old toolchain for 32-bit systems
otherwise they
would compiletely break without any toolchain
…On 10/27/18, The EMARD ***@***.***> wrote:
When I look better, we should have 7.2 toolchain for both mips+riscv
in boards manager for bsd linux win osx
so gcc 4.9 probably remained from some old installation?
On 10/27/18, The EMARD ***@***.***> wrote:
> If zip toolchain is just removed this from bm installation directory
> without
> any other fix, fpgarduino board manager will no longer be installable
> effectively breaking everything :)
>
>
> On 10/27/18, Marko Zec ***@***.***> wrote:
>> I removed the pre gcc-7.2 toolchains from the bm on our website as a
>> precaution for this to reocur.
>>
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>> #32 (comment)
>
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I got the toolchain from http://www.nxlab.fer.hr/fpgarduino/ and it was 64-bit: |
The 7.2-based toolchain for 32-bit linux was built at the same time the 64-bit version was. We have 5 different toolchains based on gcc-7.2 since 2017 so there's no reason to use anything else: login% ls -l tool |
Ok a lot of links on http://www.nxlab.fer.hr/fpgarduino/ are broken now but I figured the name of the new one to be www.nxlab.fer.hr/fpgarduino/bm/f32c-lin64-toolchain-7_2.tar.gz now, using that I got following result:
|
As explained in YosysHQ/picorv32#92 you can find a working example in https://github.com/FPGAwars/Alhambra-II-FPGA/tree/master/examples/picorv32/picosoc (see e.g. https://github.com/FPGAwars/Alhambra-II-FPGA/blob/master/examples/picorv32/picosoc/Makefile). |
Hi drtrigon, pls. try adding -mabi=ilp32 to riscv32-elf-gcc invocation options. |
Works! The created .elf file differs by one byte from the one the original toolchain generated a few days before. Nice! Uploaded using |
Do you need more info from my side? |
HI
I think that's ok for now, I'm preparing to update arduino release with
riscv 7.2 compiler for linux-32bit, I'm preparing some additional
files there too
…On 10/28/18, drtrigon ***@***.***> wrote:
Do you need more info from my side?
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Oh, by the way the links on http://www.nxlab.fer.hr/fpgarduino/ are still broken, quite some confusion with "_", "-" and "." going on there, e.g.: |
Any news? |
HI
I'm still fixing the flash/sd bootloader to make the f32c load
at power-on the user-compiled sketch (*.bin from arduino).
I have some positive results on ulx3s and papilio-pro but in
the meantime ulx2s stopped working so I'm fixing it now.
…On 11/9/18, drtrigon ***@***.***> wrote:
Any news?
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Sorry to hear that but thanks a lot for your work! (I'm eager to test it on Alhambra... ;) |
What is the current status? Do you have an estimate by when I can start using it on the Alhambra? |
HI
q3k managed to compile f32c on ice40, maybe you can try the same:
http://www.twipu.com/RadionaOrg/tweet/1068227927773536256
Although fpgarduino can run on bare-bones risc-v for blink,
using f32c is good for it has rich SOC which would provide you a lot of
additional soft-core hardware.
…On 12/4/18, drtrigon ***@***.***> wrote:
What is the current status? Do you have an estimate by when I can start
using it on the Alhambra?
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#32 (comment)
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bootloader size is <1K, that's OK then
Have you tried my blinkled example with changed adress 300000
source from my prjtrellis-picorv32 example?
have you selected generic board 8K?
Does -D__F32C__=0 appear in compiler logs?
one important fact to check is that your picorv32 mapped RAM with
firmware.c starts at address 0x0 and that this firmware is read/writeable
(not read-only ROM).
If you have ram at different address you can change it in boards.txt
replacing 0x400 with something else
…On 3/18/19, drtrigon ***@***.***> wrote:
firmware.bin is 1020 bytes. What else could it be?
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I'm not expert at picorv32 but let's speculate
that bootloader firmware is running off flash
and 1K of RAM is mapped at 0x0 and that picorv32
can JUMP to RAM and execute. Not all CPUs SOCs can do so,
sometimes RAM is only for data and flash is only for instructions,
this setup is not useable by fpgarduino.
In case it can jump to RAM then:
Im not sure will it work but you can try:
fpga_generic.menu.ramsize.8.compiler.ld.extra_flags=--section-start=.init=0x0
…On 3/18/19, D EMARD ***@***.***> wrote:
bootloader size is <1K, that's OK then
Have you tried my blinkled example with changed adress 300000
source from my prjtrellis-picorv32 example?
have you selected generic board 8K?
Does -D__F32C__=0 appear in compiler logs?
one important fact to check is that your picorv32 mapped RAM with
firmware.c starts at address 0x0 and that this firmware is read/writeable
(not read-only ROM).
If you have ram at different address you can change it in boards.txt
replacing 0x400 with something else
On 3/18/19, drtrigon ***@***.***> wrote:
> firmware.bin is 1020 bytes. What else could it be?
>
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we have additional "problem" as this ram size is probably too small
average blinkled could be larger than 1K, you may need to increase
this RAM length in SOC if possible
MEMORY
{
FLASH (rx) : ORIGIN = 0x00100000, LENGTH = 0x400000 /* entire
flash, 4 MiB */
RAM (xrw) : ORIGIN = 0x00000000, LENGTH = 0x000400 /* 1 KB */
}
…On 3/18/19, D EMARD ***@***.***> wrote:
I'm not expert at picorv32 but let's speculate
that bootloader firmware is running off flash
and 1K of RAM is mapped at 0x0 and that picorv32
can JUMP to RAM and execute. Not all CPUs SOCs can do so,
sometimes RAM is only for data and flash is only for instructions,
this setup is not useable by fpgarduino.
In case it can jump to RAM then:
Im not sure will it work but you can try:
fpga_generic.menu.ramsize.8.compiler.ld.extra_flags=--section-start=.init=0x0
On 3/18/19, D EMARD ***@***.***> wrote:
> bootloader size is <1K, that's OK then
>
> Have you tried my blinkled example with changed adress 300000
> source from my prjtrellis-picorv32 example?
>
> have you selected generic board 8K?
> Does -D__F32C__=0 appear in compiler logs?
>
> one important fact to check is that your picorv32 mapped RAM with
> firmware.c starts at address 0x0 and that this firmware is read/writeable
> (not read-only ROM).
>
> If you have ram at different address you can change it in boards.txt
> replacing 0x400 with something else
>
>
>
> On 3/18/19, drtrigon ***@***.***> wrote:
>> firmware.bin is 1020 bytes. What else could it be?
>>
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I will again look into this as soon as I have time. I think we are quite close now, just the mem mapping. Some of your suggetion have be checked alteady (select 8K board, F32C flag, ) - except the mapping, so I think/hope its that. |
The core itself is OK, just we need to know particular configuration
address of RAM, size of RAM and can CPU execute code from the RAM
…On 3/19/19, drtrigon ***@***.***> wrote:
I will again look into this as soon as I have time. I think we are quite
close now, just the mem mapping. Some of your suggetion habe be checked
alteady (select 8K board, __F32C__ flag, ) - except the mapping, so I
think/hope its that.
Btw some info about the core I use - may be helpful:
https://github.com/cliffordwolf/picorv32/blob/master/README.md (however not
too much aboutmapping)
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#32 (comment)
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I can follow your speculations and they seem reasonable to me. I just checked, the compiled blinky is 200 bytes - so that's fine. I tested with edit: Just came to my mind... what about this in firmware.c - might this be our issue:
|
We need picorv32 expert now. I'm not sure can thic
picorv32 jump to code in RAM from 0x0
This system setup is different than my ECP5
where bootloader is in BRAM, size 32K I think.
Maybe we can do a trick to test: Upload blink.ino.bin
using ICE40 flashing tool to some higher flash address
not to touch bootloader, say 0x200000
and set same adress .init=0x200000
then try to "upload" blink.
It will upload over ROM flash (actually nothing will happen)
and jump to the code which is already there!
if that blinks and 0x0 doesn't blink then we know,
picorv32 on ice40 is not configured that it can execute from RAM
…On 3/19/19, drtrigon ***@***.***> wrote:
I can follow your speculations and they seem reasonable to me. I just
checked, the compiled blinky is 200 bytes - so that's fine. I tested with
`--section-start=.init=0x0` but no change. I can confirm that firmware is in
flash as the command to upload it is `$(ICESTORM)/iceprog -o 1M
$(FIRMWARE).bin` so to a offset of 1M - thus that must be flash.
May be https://github.com/cliffordwolf/picorv32/tree/master/picosoc answers
most of the questions: "The flash is mapped to the memory regions starting
at 0x00000000 and 0x01000000, with the SRAM overlayed for the mapping at
0x00000000. The SRAM is just a small scratchpad memory (default 256 words,
i.e. 1 kB).
The reset vector is set to 0x00100000, i.e. at 1MB into in the flash
memory."
If not, a look into the source could help:
https://github.com/FPGAwars/Alhambra-II-FPGA/tree/master/examples/picorv32/picosoc
.
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I did not blink at 2M. But I had to change blinky a bit:
|
Just to be very sure I posted my actual firmware.c as gist, may be you want to have a look over it (I had quite some changes after all the time trying): https://gist.github.com/drtrigon/22a3beaf3dd7953006f1253574297bfc |
Hmmm well I don't see any obvious error now,
this blink you posted should work, something else is wrong.
It should be possible to jump from normal bootloader to 2M location
and see the blink
…On 3/20/19, drtrigon ***@***.***> wrote:
Just to be very sure I posted my actual firmware.c as gist, may be you want
to have a look over it (I had quite some changes after all the time trying):
https://gist.github.com/drtrigon/22a3beaf3dd7953006f1253574297bfc
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You may want to jump over to the work that Lawrie Griffiths has been doing on iCE40, rather than continuing this 'issue' here: https://github.com/lawrie/MuraxArduino You can catch-up on where this started and where it has gone here: https://forum.mystorm.uk/t/soft-arduino-and-accelerated-libraries/517 |
@uXeBoy: Thanks for the hint! So how directly can this be ported to Alhambra II board, do you have a clue? @emard: Looked into the bootloader (firmware.c) for quite some time:
|
Other solution not involving a bootloader firmware but using the Arduino IDE as replacement for the Makefile I was using - not what I aim for but a good first step into the right direction (icestudio+arduinoide). You have to create a folder called "hardware" in you arduino sketchbook folder and unpack this archive there. AlhambraII_Generic_picorv32.tar.gz Enjoy and tell me what you think! |
@emard: Basically this what I had in mind 5 mo ago. As my code compiles on your gcc toolchain the only thing needed is iceprog. As icestudio should be installed first anyway we can just use its toolchain. So all there (except its not using your bootloader yet). Will you add it to FPGArduino? |
Bitstream itself is no problem to add,
but for this to be useful fpgarduino also needs statically linked
uploading program, preferrably available and tested of windows and linux
at least. Edit your boards.txt and platform.txt until you are satisfied,
upload files on github and i'll pick them and integrate in fpgarduino
…On 3/23/19, drtrigon ***@***.***> wrote:
Basically this what I had in mind 5 mo ago. As my code compiles on your gcc
toolchain the only thing needed is iceprog. As icestudio should be installed
first anyway we can just use its toolchain. So all there (except its not
using your bootloader yet).
I can also provide a bitstream with a reference picorv32 design if you like
to add one.
Will you add it to FPGArduino?
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linux, win and mac available as I took it from icestudio toolchain: https://github.com/FPGAwars/icestudio/releases and https://github.com/FPGAwars/icestudio/blob/develop/README.md#package However I have to check whether they are statically linked. Will put it on github as soon as I have time. Meanwhile there is the archive I posted before. |
They are statically linked: https://github.com/FPGAwars/toolchain-icestorm/wiki |
Yes they are good for inclusion.
Just use any of them for one of the platforms
you have and modifiy boards.txt and/or platform.txt
to use this tool to check if it works as you like
…On 3/23/19, drtrigon ***@***.***> wrote:
They are statically linked:
https://github.com/FPGAwars/toolchain-icestorm/wiki
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github repo: https://github.com/drtrigon/fpgarduino-icestorm Just used iceprog in https://github.com/FPGAwars/toolchain-icestorm/releases/download/v1.11.0/toolchain-icestorm-linux_x86_64-1.11.0.tar.gz from https://github.com/FPGAwars/toolchain-icestorm/releases/ with success. I can confirm this works. (No need to change anything in boards.txt and/or platform.txt.) |
Do you need more info from my side? |
no but I'm a bit busy with some unsorted stuff
yes I can collect your binaries and put in fpgarduino
as additional support, relying on your report that it works
…On 3/30/19, drtrigon ***@***.***> wrote:
Do you need more info from my side?
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As soon as you had time to put it in I'll happily test it! I guess there might be some things to sort out and polish. Next step then would be to work on the "core" the includes and headers that make it look like arduino code. |
Note to myself: While working on YosysHQ/picorv32#121 realized that I used the old buggy linker script (missing an |
@emard: did you had time to look into it? |
ups not yet it is in my todo list, but as you can see
now I'm trying to get scopeio running on ulx3s
…On 5/13/19, drtrigon ***@***.***> wrote:
@emard: did you had time to look into it?
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Sounds intressting. Also for inclusion as possible fpgarduino peripherial?
Am 13. Mai 2019 09:29:54 MESZ schrieb emard <[email protected]>:
…ups not yet it is in my todo list, but as you can see
now I'm trying to get scopeio running on ulx3s
On 5/13/19, drtrigon ***@***.***> wrote:
> @emard: did you had time to look into it?
>
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so far it's an oscilloscope, a standalone core/tool
that can be added something else, to monitor
internal signals
…On 5/13/19, drtrigon ***@***.***> wrote:
Sounds intressting. Also for inclusion as possible fpgarduino peripherial?
Am 13. Mai 2019 09:29:54 MESZ schrieb emard ***@***.***>:
>ups not yet it is in my todo list, but as you can see
>now I'm trying to get scopeio running on ulx3s
>
>
>On 5/13/19, drtrigon ***@***.***> wrote:
>> @emard: did you had time to look into it?
>>
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Latest commit: drtrigon/fpgarduino-icestorm@09d6520 What does work now:
|
According to YosysHQ/picorv32#92 picorv32 RISC soft core runs on Alhambra board. Is it possible to add support for this to FPGArduino?
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