Skip to content

chore: Bump kona + asterisc #15823

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
clabby merged 1 commit into from
May 12, 2025
Merged

chore: Bump kona + asterisc #15823

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions docker-bake.hcl
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,11 +7,11 @@ variable "REPOSITORY" {
}

variable "KONA_VERSION" {
default = "0.1.0-beta.18"
default = "1.0.1"
}

variable "ASTERISC_VERSION" {
default = "v1.2.0"
default = "v1.3.0"
}

variable "GIT_COMMIT" {
Expand Down
2 changes: 1 addition & 1 deletion kurtosis-devnet/justfile
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -34,7 +34,7 @@ op-batcher-image TAG='op-batcher:devnet': (_docker_build_stack TAG "op-batcher-t
# TODO: this is a temporary hack to get the kona + asterisc version right.
# Ideally the Dockerfile should be self-sufficient (right now we depend on
# docker-bake.hcl to do the right thing).
op-challenger-image TAG='op-challenger:devnet': (_docker_build_stack TAG "op-challenger-target" "--build-arg" "KONA_VERSION=0.1.0-beta.18" "--build-arg" "ASTERISC_VERSION=v1.2.0")
op-challenger-image TAG='op-challenger:devnet': (_docker_build_stack TAG "op-challenger-target" "--build-arg" "KONA_VERSION=1.0.1" "--build-arg" "ASTERISC_VERSION=v1.3.0")
op-conductor-image TAG='op-conductor:devnet': (_docker_build_stack TAG "op-conductor-target")
op-deployer-image TAG='op-deployer:devnet': (_docker_build_stack TAG "op-deployer-target")
op-dispute-mon-image TAG='op-dispute-mon:devnet': (_docker_build_stack TAG "op-dispute-mon-target")
Expand Down
2 changes: 1 addition & 1 deletion mise.toml
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -44,7 +44,7 @@ op-acceptor = "op-acceptor/v0.1.10"
# Put things here if you need to track versions of tools or projects that can't
# actually be managed by mise (yet). Make sure that anything you put in here is
# also found inside of disabled_tools or mise will try to install it.
asterisc = "1.2.0"
asterisc = "1.3.0"
kontrol = "1.0.90"
binary_signer = "1.0.4"

Expand Down
4 changes: 2 additions & 2 deletions packages/contracts-bedrock/snapshots/semver-lock.json
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -204,8 +204,8 @@
"sourceCodeHash": "0x42151e2547ec5270353977fd66e78fa1fde18f362d7021cf7ddce16d5201b3ec"
},
"src/vendor/asterisc/RISCV.sol:RISCV": {
"initCodeHash": "0x7329cca924e189eeaa2d883234f6cb5fd787c8bf3339d8298e721778c2947ce5",
"sourceCodeHash": "0x02025b303a8f37b4e541f8c7936a8651402a60ea0147a53176e06b51b15a1f84"
"initCodeHash": "0x4cd639f7da4eaf86a98eb3227fe285c0e8380ff5c79c4745aefed804cef52162",
"sourceCodeHash": "0x1d18c55a910212cc7572d2e8673c5f092db8352dda1137739c71df18d4ee1db1"
},
"src/vendor/eas/EAS.sol:EAS": {
"initCodeHash": "0xbd79d6fff128b3da3e09ead84b805b7540740190488f2791a6b4e5b7aabf9cff",
Expand Down
88 changes: 72 additions & 16 deletions packages/contracts-bedrock/src/vendor/asterisc/RISCV.sol
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -285,34 +285,44 @@ contract RISCV is IBigStepper {
out := 0
}
function stateOffsetPreimageKey() -> out {
out := add(stateOffsetMemRoot(), stateSizeMemRoot())
out := 32 // 0 + 32
// out := add(stateOffsetMemRoot(), stateSizeMemRoot())
}
function stateOffsetPreimageOffset() -> out {
out := add(stateOffsetPreimageKey(), stateSizePreimageKey())
out := 64 // 32 + 32
// out := add(stateOffsetPreimageKey(), stateSizePreimageKey())
}
function stateOffsetPC() -> out {
out := add(stateOffsetPreimageOffset(), stateSizePreimageOffset())
out := 72 // 64 + 8
// out := add(stateOffsetPreimageOffset(), stateSizePreimageOffset())
}
function stateOffsetExitCode() -> out {
out := add(stateOffsetPC(), stateSizePC())
out := 80 // 72 + 8
// out := add(stateOffsetPC(), stateSizePC())
}
function stateOffsetExited() -> out {
out := add(stateOffsetExitCode(), stateSizeExitCode())
out := 81 // 80 + 1
// out := add(stateOffsetExitCode(), stateSizeExitCode())
}
function stateOffsetStep() -> out {
out := add(stateOffsetExited(), stateSizeExited())
out := 82 // 81 + 1
// out := add(stateOffsetExited(), stateSizeExited())
}
function stateOffsetHeap() -> out {
out := add(stateOffsetStep(), stateSizeStep())
out := 90 // 82 + 8
// out := add(stateOffsetStep(), stateSizeStep())
}
function stateOffsetLoadReservation() -> out {
out := add(stateOffsetHeap(), stateSizeHeap())
out := 98 // 90 + 8
// out := add(stateOffsetHeap(), stateSizeHeap())
}
function stateOffsetRegisters() -> out {
out := add(stateOffsetLoadReservation(), stateSizeLoadReservation())
out := 106 // 98 + 8
// out := add(stateOffsetLoadReservation(), stateSizeLoadReservation())
}
function stateSize() -> out {
out := add(stateOffsetRegisters(), stateSizeRegisters())
out := 362 // 106 + 256
// out := add(stateOffsetRegisters(), stateSizeRegisters())
}

//
Expand Down Expand Up @@ -346,6 +356,13 @@ contract RISCV is IBigStepper {
}
if iszero(eq(_proof.offset, proofContentOffset())) { revert(0, 0) }

if mod(calldataload(sub(proofContentOffset(), 32)), mul(60, 32)) {
// proof offset must be stateContentOffset+paddedStateSize+32
// proof size: 64-5+1=60 * 32 byte leaf,
// so the proofSize must be a multiple of 60*32
revert(0, 0)
}

//
// State loading
//
Expand Down Expand Up @@ -738,6 +755,8 @@ contract RISCV is IBigStepper {
}

function storeMem(addr, size, value, proofIndexL, proofIndexR) {
if gt(size, 8) { revertWithCode(0xbad512e8) } // cannot store more than 8 bytes

storeMemUnaligned(addr, size, u64ToU256(value), proofIndexL, proofIndexR)
}

Expand Down Expand Up @@ -888,7 +907,7 @@ contract RISCV is IBigStepper {

let errCode := 0
// ensure MAP_ANONYMOUS is set and fd == -1
switch or(iszero(and(flags, 0x20)), not(eq(fd, u64Mask())))
switch or(iszero(and(flags, 0x20)), iszero(eq(fd, u64Mask())))
case 1 {
addr := u64Mask()
errCode := toU64(0x4d)
Expand Down Expand Up @@ -1147,6 +1166,10 @@ contract RISCV is IBigStepper {
let pc_ := _pc
// 000_0011: memory loading
// LB, LH, LW, LD, LBU, LHU, LWU

// bits[14:12] set to 111 are reserved
if eq64(funct3, toU64(0x7)) { revertWithCode(0xbadc0de) }

let imm := parseImmTypeI(instr)
let signed := iszero64(and64(funct3, toU64(4))) // 4 = 100 -> bitflag
let size := shl64(and64(funct3, toU64(3)), toU64(1)) // 3 = 11 -> 1, 2, 4, 8 bytes size
Expand Down Expand Up @@ -1206,6 +1229,10 @@ contract RISCV is IBigStepper {
// So it's really 13 bits with a hardcoded 0 bit.
_pc := add64(_pc, imm)
}

// The PC must be aligned to 4 bytes.
if and64(_pc, toU64(3)) { revertWithCode(0xbad10ad0) } // target not aligned with 4 bytes

// not like the other opcodes: nothing to write to rd register, and PC has already changed
setPC(_pc)
}
Expand Down Expand Up @@ -1247,6 +1274,7 @@ contract RISCV is IBigStepper {
// 010000 = SRAI
rdValue := sar64(and64(imm, toU64(0x3F)), rs1Value) // lower 6 bits in 64 bit mode
}
default { revertWithCode(0xbadc0de) }
}
case 6 {
// 110 = ORI
Expand All @@ -1256,6 +1284,7 @@ contract RISCV is IBigStepper {
// 111 = ANDI
rdValue := and64(rs1Value, imm)
}
default { revertWithCode(0xbadc0de) }
setRegister(rd, rdValue)
setPC(add64(_pc, toU64(4)))
}
Expand All @@ -1271,9 +1300,15 @@ contract RISCV is IBigStepper {
}
case 1 {
// 001 = SLLIW

// SLLIW where imm[5] != 0 is reserved
if and64(imm, toU64(0x20)) { revertWithCode(0xbadc0de) }
rdValue := mask32Signed64(shl64(and64(imm, toU64(0x1F)), rs1Value))
}
case 5 {
// SRLIW and SRAIW where imm[5] != 0 is reserved
if and64(imm, toU64(0x20)) { revertWithCode(0xbadc0de) }

// 101 = SR~
let shamt := and64(imm, toU64(0x1F))
switch shr64(toU64(5), imm)
Expand All @@ -1286,7 +1321,9 @@ contract RISCV is IBigStepper {
// 0100000 = SRAIW
rdValue := signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), sub64(toU64(31), shamt))
}
default { revertWithCode(0xbadc0de) }
}
default { revertWithCode(0xbadc0de) }
setRegister(rd, rdValue)
setPC(add64(_pc, toU64(4)))
}
Expand Down Expand Up @@ -1340,6 +1377,7 @@ contract RISCV is IBigStepper {
case 0 { rdValue := rs1Value }
default { rdValue := mod64(rs1Value, rs2Value) }
}
default { revertWithCode(0xbadc0de) }
}
default {
switch funct3
Expand All @@ -1354,6 +1392,7 @@ contract RISCV is IBigStepper {
// 0100000 = SUB
rdValue := sub64(rs1Value, rs2Value)
}
default { revertWithCode(0xbadc0de) }
}
case 1 {
// 001 = SLL
Expand Down Expand Up @@ -1383,6 +1422,7 @@ contract RISCV is IBigStepper {
// 0100000 = SRA
rdValue := sar64(and64(rs2Value, toU64(0x3F)), rs1Value) // arithmetic: sign bit is extended
}
default { revertWithCode(0xbadc0de) }
}
case 6 {
// 110 = OR
Expand All @@ -1392,14 +1432,15 @@ contract RISCV is IBigStepper {
// 111 = AND
rdValue := and64(rs1Value, rs2Value)
}
default { revertWithCode(0xbadc0de) }
}
setRegister(rd, rdValue)
setPC(add64(_pc, toU64(4)))
}
case 0x3B {
// 011_1011: register arithmetic and logic in 32 bits
let rs1Value := getRegister(rs1)
let rs2Value := getRegister(rs2)
let rs2Value := and64(getRegister(rs2), u32Mask())
let rdValue := 0
switch funct7
case 1 {
Expand Down Expand Up @@ -1441,6 +1482,7 @@ contract RISCV is IBigStepper {
rdValue := mask32Signed64(mod64(and64(rs1Value, u32Mask()), and64(rs2Value, u32Mask())))
}
}
default { revertWithCode(0xbadc0de) }
}
default {
switch funct3
Expand All @@ -1455,6 +1497,7 @@ contract RISCV is IBigStepper {
// 0100000 = SUBW
rdValue := mask32Signed64(sub64(and64(rs1Value, u32Mask()), and64(rs2Value, u32Mask())))
}
default { revertWithCode(0xbadc0de) }
}
case 1 {
// 001 = SLLW
Expand All @@ -1472,7 +1515,9 @@ contract RISCV is IBigStepper {
// 0100000 = SRAW
rdValue := signExtend64(shr64(shamt, and64(rs1Value, u32Mask())), sub64(toU64(31), shamt))
}
default { revertWithCode(0xbadc0de) }
}
default { revertWithCode(0xbadc0de) }
}
setRegister(rd, rdValue)
setPC(add64(_pc, toU64(4)))
Expand All @@ -1496,7 +1541,13 @@ contract RISCV is IBigStepper {
let imm := parseImmTypeJ(instr)
let rdValue := add64(_pc, toU64(4))
setRegister(rd, rdValue)
setPC(add64(_pc, signExtend64(shl64(toU64(1), imm), toU64(20)))) // signed offset in multiples of 2

let newPC := add64(_pc, signExtend64(shl64(toU64(1), imm), toU64(20)))
if and64(newPC, toU64(3)) {
// quick target alignment check
revertWithCode(0xbad10ad0) // target not aligned with 4 bytes
}
setPC(newPC) // signed offset in multiples of 2
// bytes (last bit is there, but ignored)
}
case 0x67 {
Expand All @@ -1505,8 +1556,13 @@ contract RISCV is IBigStepper {
let imm := parseImmTypeI(instr)
let rdValue := add64(_pc, toU64(4))
setRegister(rd, rdValue)
setPC(and64(add64(rs1Value, signExtend64(imm, toU64(11))), xor64(u64Mask(), toU64(1)))) // least
// significant bit is set to 0

let newPC := and64(add64(rs1Value, signExtend64(imm, toU64(11))), xor64(u64Mask(), toU64(1)))
if and64(newPC, toU64(3)) {
// quick target alignment check
revertWithCode(0xbad10ad0) // target not aligned with 4 bytes
}
setPC(newPC) // least significant bit is set to 0
}
case 0x73 {
// 111_0011: environment things
Expand Down Expand Up @@ -1548,7 +1604,7 @@ contract RISCV is IBigStepper {
if or(lt64(size, toU64(4)), gt64(size, toU64(8))) { revertWithCode(0xbada70) } // bad AMO size

let addr := getRegister(rs1)
if and64(addr, toU64(3)) {
if mod64(addr, size) {
// quick addr alignment check
revertWithCode(0xbad10ad0) // addr not aligned with 4 bytes
}
Expand Down