esp32c3 efuse codeing error (IDFGH-11341) #12489
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By the way, I have ensured that block4~block7 are empty and have not been written before. |
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Hi @gl-chenxiaosheng! After a burn operation efuses are read back to compare whether it was burned correctly or not. This logs says that it is not, probably due to write or read protection bits. |
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Thank to your reply. The data that i wan to write is "61cceb487a606433" , "776a3039386239", "9483C4A098B9". And I try it from Block 3 to Block7, the result show the "9483C4A098B9" mistask written to "9483C4A044B9". There is the the summary of the whole efuses. espefuse.py v4.7.dev2
Connecting....
Detecting chip type... ESP32-C3
Error(s) in BLOCK3 [ERRORS:1 FAIL:0]
Error(s) in BLOCK4 [ERRORS:1 FAIL:0]
Error(s) in BLOCK5 [ERRORS:1 FAIL:1]
Error(s) in BLOCK6 [ERRORS:1 FAIL:1]
Error(s) in BLOCK7 [ERRORS:1 FAIL:1]
BLOCK0 ( ) [0 ] err__regs: 00000000 00000000 00000000 00000000 00000000 00000000
EFUSE_RD_RS_ERR0_REG 0x89911100
EFUSE_RD_RS_ERR1_REG 0x00000000
=== Run "summary" command ===
EFUSE_NAME (Block) Description = [Meaningful Value] [Readable/Writeable] (Hex Value)
----------------------------------------------------------------------------------------
Calibration fuses:
K_RTC_LDO (BLOCK1) BLOCK1 K_RTC_LDO = 36 R/W (0b0001001)
K_DIG_LDO (BLOCK1) BLOCK1 K_DIG_LDO = 4 R/W (0b0000001)
V_RTC_DBIAS20 (BLOCK1) BLOCK1 voltage of rtc dbias20 = 76 R/W (0x13)
V_DIG_DBIAS20 (BLOCK1) BLOCK1 voltage of digital dbias20 = 16 R/W (0x04)
DIG_DBIAS_HVT (BLOCK1) BLOCK1 digital dbias when hvt = -12 R/W (0b10011)
THRES_HVT (BLOCK1) BLOCK1 pvt threshold when hvt = 1800 R/W (0b0111000010)
TEMP_CALIB (BLOCK2) Temperature calibration data = -9.3 R/W (0b101011101)
OCODE (BLOCK2) ADC OCode = 104 R/W (0x68)
ADC1_INIT_CODE_ATTEN0 (BLOCK2) ADC1 init code at atten0 = 1544 R/W (0b0110000010)
ADC1_INIT_CODE_ATTEN1 (BLOCK2) ADC1 init code at atten1 = -72 R/W (0b1000010010)
ADC1_INIT_CODE_ATTEN2 (BLOCK2) ADC1 init code at atten2 = -156 R/W (0b1000100111)
ADC1_INIT_CODE_ATTEN3 (BLOCK2) ADC1 init code at atten3 = -616 R/W (0b1010011010)
ADC1_CAL_VOL_ATTEN0 (BLOCK2) ADC1 calibration voltage at atten0 = -276 R/W (0b1001000101)
ADC1_CAL_VOL_ATTEN1 (BLOCK2) ADC1 calibration voltage at atten1 = -36 R/W (0b1000001001)
ADC1_CAL_VOL_ATTEN2 (BLOCK2) ADC1 calibration voltage at atten2 = -228 R/W (0b1000111001)
ADC1_CAL_VOL_ATTEN3 (BLOCK2) ADC1 calibration voltage at atten3 = -332 R/W (0b1001010011)
Config fuses:
WR_DIS (BLOCK0) Disable programming of individual eFuses = 0 R/W (0x00000000)
RD_DIS (BLOCK0) Disable reading from BlOCK4-10 = 0 R/W (0b0000000)
DIS_ICACHE (BLOCK0) Set this bit to disable Icache = False R/W (0b0)
DIS_TWAI (BLOCK0) Set this bit to disable CAN function = False R/W (0b0)
DIS_DIRECT_BOOT (BLOCK0) Disable direct boot mode = False R/W (0b0)
UART_PRINT_CONTROL (BLOCK0) Set the default UARTboot message output mode = Enable R/W (0b00)
ERR_RST_ENABLE (BLOCK0) Use BLOCK0 to check error record registers = with check R/W (0b1)
BLOCK_USR_DATA (BLOCK3)[error] User data
= 61 cc eb 48 7a 60 64 33 77 6a 30 39 38 62 39 00 00 00 00 00 00 00 00 00 00 94 83 c4 a0 44 b9 00 R/W
BLOCK_SYS_DATA2 (BLOCK10) System data part 2 (reserved)
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash fuses:
FLASH_TPUW (BLOCK0) Configures flash waiting time after power-up; in u = 0 R/W (0x0)
nit of ms. If the value is less than 15; the waiti
ng time is the configurable value; Otherwise; the
waiting time is twice the configurable value
FORCE_SEND_RESUME (BLOCK0) Set this bit to force ROM code to send a resume co = False R/W (0b0)
mmand during SPI boot
FLASH_CAP (BLOCK1) Flash capacity = 4M R/W (0b001)
FLASH_TEMP (BLOCK1) Flash temperature = 105C R/W (0b01)
FLASH_VENDOR (BLOCK1) Flash vendor = XMC R/W (0b001)
Identity fuses:
DISABLE_WAFER_VERSION_MAJOR (BLOCK0) Disables check of wafer version major = False R/W (0b0)
DISABLE_BLK_VERSION_MAJOR (BLOCK0) Disables check of blk version major = False R/W (0b0)
WAFER_VERSION_MINOR_LO (BLOCK1) WAFER_VERSION_MINOR least significant bits = 4 R/W (0b100)
PKG_VERSION (BLOCK1) Package version = 1 R/W (0b001)
BLK_VERSION_MINOR (BLOCK1) BLK_VERSION_MINOR = 2 R/W (0b010)
WAFER_VERSION_MINOR_HI (BLOCK1) WAFER_VERSION_MINOR most significant bit = False R/W (0b0)
WAFER_VERSION_MAJOR (BLOCK1) WAFER_VERSION_MAJOR = 0 R/W (0b00)
OPTIONAL_UNIQUE_ID (BLOCK2) Optional unique 128-bit ID
= 4e b1 ff 6e f4 15 d3 ed 55 69 3a 35 bc 49 12 93 R/W
BLK_VERSION_MAJOR (BLOCK2) BLK_VERSION_MAJOR of BLOCK2 = With calibration R/W (0b01)
WAFER_VERSION_MINOR (BLOCK0) calc WAFER VERSION MINOR = WAFER_VERSION_MINOR_HI = 4 R/W (0x4)
<< 3 + WAFER_VERSION_MINOR_LO (read only)
Jtag fuses:
SOFT_DIS_JTAG (BLOCK0) Set these bits to disable JTAG in the soft way (od = 0 R/W (0b000)
d number 1 means disable ). JTAG can be enabled in
HMAC module
DIS_PAD_JTAG (BLOCK0) Set this bit to disable JTAG in the hard way. JTAG = False R/W (0b0)
is disabled permanently
Mac fuses:
MAC (BLOCK1) MAC address
= 48:27:e2:ab:c1:68 (OK) R/W
CUSTOM_MAC (BLOCK3)[error] Custom MAC address
= 94:83:c4:a0:44:b9 (Block3 has ERRORS:1 FAIL:0) R/W
Security fuses:
DIS_DOWNLOAD_ICACHE (BLOCK0) Set this bit to disable Icache in download mode (b = False R/W (0b0)
oot_mode[3:0] is 0; 1; 2; 3; 6; 7)
DIS_FORCE_DOWNLOAD (BLOCK0) Set this bit to disable the function that forces c = False R/W (0b0)
hip into download mode
DIS_DOWNLOAD_MANUAL_ENCRYPT (BLOCK0) Set this bit to disable flash encryption when in d = False R/W (0b0)
ownload boot modes
SPI_BOOT_CRYPT_CNT (BLOCK0) Enables flash encryption when 1 or 3 bits are set = Disable R/W (0b000)
and disables otherwise
SECURE_BOOT_KEY_REVOKE0 (BLOCK0) Revoke 1st secure boot key = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE1 (BLOCK0) Revoke 2nd secure boot key = False R/W (0b0)
SECURE_BOOT_KEY_REVOKE2 (BLOCK0) Revoke 3rd secure boot key = False R/W (0b0)
KEY_PURPOSE_0 (BLOCK0) Purpose of Key0 = USER R/W (0x0)
KEY_PURPOSE_1 (BLOCK0) Purpose of Key1 = USER R/W (0x0)
KEY_PURPOSE_2 (BLOCK0) Purpose of Key2 = USER R/W (0x0)
KEY_PURPOSE_3 (BLOCK0) Purpose of Key3 = USER R/W (0x0)
KEY_PURPOSE_4 (BLOCK0) Purpose of Key4 = USER R/W (0x0)
KEY_PURPOSE_5 (BLOCK0) Purpose of Key5 = USER R/W (0x0)
SECURE_BOOT_EN (BLOCK0) Set this bit to enable secure boot = False R/W (0b0)
SECURE_BOOT_AGGRESSIVE_REVOKE (BLOCK0) Set this bit to enable revoking aggressive secure = False R/W (0b0)
boot
DIS_DOWNLOAD_MODE (BLOCK0) Set this bit to disable download mode (boot_mode[3 = False R/W (0b0)
:0] = 0; 1; 2; 3; 6; 7)
ENABLE_SECURITY_DOWNLOAD (BLOCK0) Set this bit to enable secure UART download mode = False R/W (0b0)
SECURE_VERSION (BLOCK0) Secure version (used by ESP-IDF anti-rollback feat = 0 R/W (0x0000)
ure)
BLOCK_KEY0 (BLOCK4)[error]
Purpose: USER
Key0 or user data
= 61 cc eb 48 7a 60 64 33 77 6a 30 39 38 62 39 00 00 00 00 00 00 00 00 00 00 94 83 c4 a0 44 b9 00 R/W
BLOCK_KEY1 (BLOCK5)[error]
Purpose: USER
Key1 or user data
= 61 cc eb 48 7a 60 64 33 77 6a 30 39 38 62 39 00 00 00 00 00 00 00 00 00 00 94 83 c4 a0 44 b9 00 R/W
BLOCK_KEY2 (BLOCK6)[error]
Purpose: USER
Key2 or user data
= 61 cc eb 48 7a 60 64 33 77 6a 30 39 38 62 39 00 00 00 00 00 00 00 00 00 00 94 83 c4 a0 44 b9 00 R/W
BLOCK_KEY3 (BLOCK7)[error]
Purpose: USER
Key3 or user data
= 61 cc eb 48 7a 60 64 33 77 6a 30 39 38 62 39 00 00 00 00 00 00 00 00 00 00 94 83 c4 a0 44 b9 00 R/W
BLOCK_KEY4 (BLOCK8)
Purpose: USER
Key4 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
BLOCK_KEY5 (BLOCK9)
Purpose: USER
Key5 or user data
= 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Spi Pad fuses:
SPI_PAD_CONFIG_CLK (BLOCK1) SPI PAD CLK = 0 R/W (0b000000)
SPI_PAD_CONFIG_Q (BLOCK1) SPI PAD Q(D1) = 0 R/W (0b000000)
SPI_PAD_CONFIG_D (BLOCK1) SPI PAD D(D0) = 0 R/W (0b000000)
SPI_PAD_CONFIG_CS (BLOCK1) SPI PAD CS = 0 R/W (0b000000)
SPI_PAD_CONFIG_HD (BLOCK1) SPI PAD HD(D3) = 0 R/W (0b000000)
SPI_PAD_CONFIG_WP (BLOCK1) SPI PAD WP(D2) = 0 R/W (0b000000)
SPI_PAD_CONFIG_DQS (BLOCK1) SPI PAD DQS = 0 R/W (0b000000)
SPI_PAD_CONFIG_D4 (BLOCK1) SPI PAD D4 = 0 R/W (0b000000)
SPI_PAD_CONFIG_D5 (BLOCK1) SPI PAD D5 = 0 R/W (0b000000)
SPI_PAD_CONFIG_D6 (BLOCK1) SPI PAD D6 = 0 R/W (0b000000)
SPI_PAD_CONFIG_D7 (BLOCK1) SPI PAD D7 = 0 R/W (0b000000)
Usb fuses:
DIS_USB_JTAG (BLOCK0) Set this bit to disable function of usb switch to = False R/W (0b0)
jtag in module of usb device
DIS_USB_SERIAL_JTAG (BLOCK0) USB-Serial-JTAG = Enable R/W (0b0)
USB_EXCHG_PINS (BLOCK0) Set this bit to exchange USB D+ and D- pins = False R/W (0b0)
DIS_USB_SERIAL_JTAG_ROM_PRINT (BLOCK0) USB printing = Enable R/W (0b0)
DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE (BLOCK0) Disable UART download mode through USB-Serial-JTAG = False R/W (0b0)
Vdd fuses:
VDD_SPI_AS_GPIO (BLOCK0) Set this bit to vdd spi pin function as gpio = False R/W (0b0)
Wdt fuses:
WDT_DELAY_SEL (BLOCK0) RTC watchdog timeout threshold; in unit of slow cl = 40000 R/W (0b00)
ock cycle
Error(s) in BLOCK3 [ERRORS:1 FAIL:0]
Error(s) in BLOCK4 [ERRORS:1 FAIL:0]
Error(s) in BLOCK5 [ERRORS:1 FAIL:1]
Error(s) in BLOCK6 [ERRORS:1 FAIL:1]
Error(s) in BLOCK7 [ERRORS:1 FAIL:1]
BLOCK0 ( ) [0 ] err__regs: 00000000 00000000 00000000 00000000 00000000 00000000
EFUSE_RD_RS_ERR0_REG 0x89911100
EFUSE_RD_RS_ERR1_REG 0x00000000
WARNING: Coding scheme has encoding bit error warnings |
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@gl-chenxiaosheng You need to use these APIs https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/system/efuse.html#_CPPv427esp_efuse_batch_write_beginv. See the below example to have a look how to burn efuse data into one efuse block at once. esp_efuse_batch_write_begin();
esp_efuse_write_field_blob(ESP_EFUSE_...);
esp_efuse_write_block(EFUSE_BLKx, ...);
esp_efuse_write(ESP_EFUSE_1, 3);
esp_efuse_batch_write_commit();EDIT: If I am right then you can recover data in the chip by just burning some insignificant bit in the block using espefuse.py burn_bit. That can make the RS recovering feature be disabled. |
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I was writed the ("61cceb487a606433" , "776a3039386239", "9483C4A098B9") by one batch. Like as follows: esp_efuse_batch_write_begin();
// sn
esp_efuse_write_field_blob(ESP_EFUSE_USER_DATA_SN_64, value, (value_len * 8));
vTaskDelay(10 / portTICK_PERIOD_MS);
// ddns
esp_efuse_write_field_blob(ESP_EFUSE_USER_DATA_DDNS_56, value, (value_len * 8));
vTaskDelay(10 / portTICK_PERIOD_MS);
// basic mac
esp_efuse_write_field_blob(ESP_EFUSE_USER_DATA_MAC_CUSTOM, value, (value_len * 8));
vTaskDelay(10 / portTICK_PERIOD_MS);
esp_efuse_batch_write_commit();I know RS algorithm will also burned the encoded data. But it is only on one block, right? So i try these data to other block, like block4 to block7 which can be user burned. |
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@gl-chenxiaosheng |
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@gl-chenxiaosheng diff --git a/components/hal/platform_port/include/hal/misc.h b/components/hal/platform_port/include/hal/misc.h
index c6e50ad..ab24c1e 100644
--- a/components/hal/platform_port/include/hal/misc.h
+++ b/components/hal/platform_port/include/hal/misc.h
@@ -66,11 +66,7 @@ extern "C" {
* @param len The number of bytes to be copied
* @return a pointer to destination
*/
-__attribute__((always_inline)) static inline void *hal_memcpy(void *dst_mem, const void *src_mem, size_t len)
-{
- asm("" : "+r"(dst_mem), "+r"(src_mem));
- return memcpy(dst_mem, src_mem, len);
-}
+#define hal_memcpy(dst_mem, src_mem, len) (__extension__({memcpy(dst_mem, src_mem, len);}))
/**
* @brief Sets the first num bytes of the block of memory pointed by ptr to the specified value
@@ -82,11 +78,7 @@ __attribute__((always_inline)) static inline void *hal_memcpy(void *dst_mem, con
* @param len The number of bytes to be copied
* @return a pointer to the memory area
*/
-__attribute__((always_inline)) static inline void *hal_memset(void *dst_mem, int value, size_t len)
-{
- asm("" : "+r"(dst_mem));
- return memset(dst_mem, value, len);
-}
+#define hal_memset(dst_mem, value, len) (__extension__({memset(dst_mem, value, len);}))
#ifdef __cplusplus
} |
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Status: Reviewing
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It works! |
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If somebody else is faced with the same issue, or similar to that an efuse BLOCK has a coding error. You can try to recover it by using -> espefuse.py check_error --recovery |
espressif-bot
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Status: Done
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Answers checklist.
General issue report
IDF version: release v5.1.1
target: esp32c3
I want to write some device infomation in BLOCK3. But it does not work as normal. There some bytes is writed mistake.
So i try again in Block4/Block5/Block6/Block7. And i see the error log as follows:
�[0;32mI (4900) efuse: BURN BLOCK7�[0m�[0;33mW (4900) efuse: BLOCK7 got a coding error�[0m�[0;31mE (4900) efuse: BURN BLOCK7 - ERROR (written bits != read bits)�[0m�[0;33mW (4900) efuse: BLOCK7: next retry to fix an error [1/3]...�[0m�[0;32mI (4910) efuse: BURN BLOCK7�[0m�[0;33mW (4910) efuse: BLOCK7 got a coding error�[0m�[0;31mE (4910) efuse: BURN BLOCK7 - ERROR (written bits != read bits)�[0m�[0;33mW (4920) efuse: BLOCK7: next retry to fix an error [2/3]...�[0m�[0;32mI (4930) efuse: BURN BLOCK7�[0m�[0;33mW (4930) efuse: BLOCK7 got a coding error�[0m�[0;31mE (4930) efuse: BURN BLOCK7 - ERROR (written bits != read bits)�[0m�[0;33mW (4940) efuse: BLOCK7: next retry to fix an error [3/3]...�[0m�[0;33mW (4950) efuse: Coding error was not fixed�[0m�[0;31mE (4950) efuse: Written data are incorrect�[0m�[0;32mI (4960) efuse: Batch mode. Prepared fields are committed�[0m�[1;31m../main/src/gl_producttest.c[506]: esp_efuse_batch_write_commit error�[0mAnd I use the espefuse.py to check the efuse summary as follows:
Error(s) in BLOCK3 [ERRORS:1 FAIL:0]Error(s) in BLOCK4 [ERRORS:1 FAIL:0]Error(s) in BLOCK5 [ERRORS:1 FAIL:1]Error(s) in BLOCK6 [ERRORS:1 FAIL:1]Error(s) in BLOCK7 [ERRORS:1 FAIL:1]BLOCK0 ( ) [0 ] err__regs: 00000000 00000000 00000000 00000000 00000000 00000000EFUSE_RD_RS_ERR0_REG 0x89911100EFUSE_RD_RS_ERR1_REG 0x00000000WARNING: Coding scheme has encoding bit error warningsHow to resolve this error?
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