Add ps_min_ modem feature

Cargo.toml

@@ -68,3 +68,4 @@ embedded-svc = [ "dep:enumset", "dep:embedded-svc", "utils" ]
 wifi = []
 ble = [ "esp32-hal?/bluetooth" ]
 phy_enable_usb = []
+ps_min_modem = []

examples/coex.rs

@@ -183,7 +183,7 @@ fn main() -> ! {
             .unwrap();
         socket.flush().unwrap();
 
-        let wait_end = current_millis() + 2 * 1000;
+        let wait_end = current_millis() + 20 * 1000;
         loop {
             let mut buffer = [0u8; 512];
             if let Ok(len) = socket.read(&mut buffer) {

examples/dhcp.rs

@@ -155,7 +155,7 @@ fn main() -> ! {
             .unwrap();
         socket.flush().unwrap();
 
-        let wait_end = current_millis() + 2 * 1000;
+        let wait_end = current_millis() + 20 * 1000;
         loop {
             let mut buffer = [0u8; 512];
             if let Ok(len) = socket.read(&mut buffer) {

examples/static_ip.rs

@@ -161,7 +161,7 @@ fn main() -> ! {
             println!("Connected");
 
             let mut time_out = false;
-            let wait_end = current_millis() + 2 * 1000;
+            let wait_end = current_millis() + 20 * 1000;
             let mut buffer = [0u8; 1024];
             let mut pos = 0;
             loop {

src/ble/mod.rs

@@ -174,8 +174,8 @@ static G_OSI_FUNCS: osi_funcs_s = osi_funcs_s {
     task_yield_from_isr: Some(task_yield_from_isr),
     semphr_create: Some(semphr_create),
     semphr_delete: Some(semphr_delete),
-    semphr_take_from_isr: Some(semphr_take_from_isr),
-    semphr_give_from_isr: Some(semphr_give_from_isr),
+    semphr_take_from_isr: Some(crate::common_adapter::semphr_take_from_isr),
+    semphr_give_from_isr: Some(crate::common_adapter::semphr_give_from_isr),
     semphr_take: Some(semphr_take),
     semphr_give: Some(semphr_give),
     mutex_create: Some(mutex_create),
@@ -308,8 +308,8 @@ static G_OSI_FUNCS: osi_funcs_s = osi_funcs_s {
     task_yield_from_isr: Some(task_yield_from_isr),
     semphr_create: Some(semphr_create),
     semphr_delete: Some(semphr_delete),
-    semphr_take_from_isr: Some(semphr_take_from_isr),
-    semphr_give_from_isr: Some(semphr_give_from_isr),
+    semphr_take_from_isr: Some(crate::common_adapter::semphr_take_from_isr),
+    semphr_give_from_isr: Some(crate::common_adapter::semphr_give_from_isr),
     semphr_take: Some(semphr_take),
     semphr_give: Some(semphr_give),
     mutex_create: Some(mutex_create),
@@ -408,20 +408,6 @@ unsafe extern "C" fn semphr_delete(sem: *const ()) {
     crate::common_adapter::semphr_delete(sem as *mut crate::binary::c_types::c_void);
 }
 
-#[ram]
-pub(crate) unsafe extern "C" fn semphr_take_from_isr(sem: *const (), hptw: *const ()) -> i32 {
-    trace!("sem take from isr");
-    (hptw as *mut u32).write_volatile(0);
-    crate::common_adapter::semphr_take(sem as *mut crate::binary::c_types::c_void, 0)
-}
-
-#[ram]
-pub(crate) unsafe extern "C" fn semphr_give_from_isr(sem: *const (), hptw: *const ()) -> i32 {
-    trace!("sem give from isr");
-    (hptw as *mut u32).write_volatile(0);
-    crate::common_adapter::semphr_give(sem as *mut crate::binary::c_types::c_void)
-}
-
 unsafe extern "C" fn semphr_take(sem: *const (), block_time_ms: u32) -> i32 {
     crate::common_adapter::semphr_take(sem as *mut crate::binary::c_types::c_void, block_time_ms)
 }
@@ -501,7 +487,9 @@ unsafe extern "C" fn queue_recv(queue: *const (), item: *const (), block_time_ms
         block_time_ms
     );
 
-    let end_time = crate::timer::get_systimer_count() + block_time_ms as u64;
+    // is this ticks or millis?
+    let end_time = crate::timer::get_systimer_count()
+        + (block_time_ms as u64 * (crate::timer::TICKS_PER_SECOND / 1000));
 
     // handle the BT_QUEUE
     if queue == &BT_INTERNAL_QUEUE as *const _ as *const () {
@@ -719,7 +707,7 @@ pub(crate) fn ble_init() {
                 static mut g_bt_plf_log_level: u32;
             }
 
-            log::info!("g_bt_plf_log_level = {}", g_bt_plf_log_level);
+            log::debug!("g_bt_plf_log_level = {}", g_bt_plf_log_level);
             g_bt_plf_log_level = 10;
         }
 

src/common_adapter/common_adapter_esp32.rs

@@ -1,66 +1,132 @@
 use super::phy_init_data::PHY_INIT_DATA_DEFAULT;
 use crate::binary::include::*;
+use atomic_polyfill::AtomicU32;
 use esp32_hal::prelude::ram;
 use log::trace;
 
+const SOC_PHY_DIG_REGS_MEM_SIZE: usize = 21 * 4;
+
+static mut SOC_PHY_DIG_REGS_MEM: [u8; SOC_PHY_DIG_REGS_MEM_SIZE] = [0u8; SOC_PHY_DIG_REGS_MEM_SIZE];
+static mut G_IS_PHY_CALIBRATED: bool = false;
+static mut G_PHY_DIGITAL_REGS_MEM: *mut u32 = core::ptr::null_mut();
+static mut S_IS_PHY_REG_STORED: bool = false;
+static mut PHY_ACCESS_REF: AtomicU32 = AtomicU32::new(0);
+static mut PHY_CLOCK_ENABLE_REF: AtomicU32 = AtomicU32::new(0);
+
 // Mask for clock bits used by both WIFI and Bluetooth
 const DPORT_WIFI_CLK_WIFI_BT_COMMON_M: u32 = 0x000003c9;
 
 const DR_REG_DPORT_BASE: u32 = 0x3ff00000;
 const DPORT_WIFI_CLK_EN_REG: u32 = DR_REG_DPORT_BASE + 0x0CC;
 
-pub(crate) unsafe extern "C" fn phy_enable() {
-    trace!("phy_enable - not fully implemented");
-
-    static mut G_IS_PHY_CALIBRATED: bool = false;
+pub(crate) fn phy_mem_init() {
+    unsafe {
+        G_PHY_DIGITAL_REGS_MEM = SOC_PHY_DIG_REGS_MEM.as_ptr() as *mut u32;
+    }
+}
 
-    let mut cal_data: [u8; core::mem::size_of::<esp_phy_calibration_data_t>()] =
-        [0u8; core::mem::size_of::<esp_phy_calibration_data_t>()];
+pub(crate) unsafe fn phy_enable() {
+    let count = PHY_ACCESS_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    if count == 0 {
+        critical_section::with(|_| {
+            // #if CONFIG_IDF_TARGET_ESP32
+            //     // Update time stamp
+            //     s_phy_rf_en_ts = esp_timer_get_time();
+            //     // Update WiFi MAC time before WiFi/BT common clock is enabled
+            //     phy_update_wifi_mac_time(false, s_phy_rf_en_ts);
+            // #endif
 
-    critical_section::with(|_| {
-        if G_IS_PHY_CALIBRATED == false {
             phy_enable_clock();
 
-            let init_data = &PHY_INIT_DATA_DEFAULT;
-
-            register_chipv7_phy(
-                init_data,
-                &mut cal_data as *mut _ as *mut crate::binary::include::esp_phy_calibration_data_t,
-                esp_phy_calibration_mode_t_PHY_RF_CAL_FULL,
-            );
-
-            G_IS_PHY_CALIBRATED = true;
-        } else {
-            trace!("implement phy_digital_regs_load");
-            phy_wakeup_init();
-            //phy_digital_regs_load();
-            /*
-            static inline void phy_digital_regs_load(void)
-            {
-            if (g_phy_digital_regs_mem != NULL)
-                {
-                phy_dig_reg_backup(false, g_phy_digital_regs_mem);
-                }
+            if G_IS_PHY_CALIBRATED == false {
+                let mut cal_data: [u8; core::mem::size_of::<esp_phy_calibration_data_t>()] =
+                    [0u8; core::mem::size_of::<esp_phy_calibration_data_t>()];
+
+                let init_data = &PHY_INIT_DATA_DEFAULT;
+
+                register_chipv7_phy(
+                    init_data,
+                    &mut cal_data as *mut _
+                        as *mut crate::binary::include::esp_phy_calibration_data_t,
+                    esp_phy_calibration_mode_t_PHY_RF_CAL_FULL,
+                );
+
+                G_IS_PHY_CALIBRATED = true;
+            } else {
+                phy_wakeup_init();
+                phy_digital_regs_load();
             }
-            */
+
+            #[cfg(coex)]
+            coex_bt_high_prio();
+
+            log::trace!("PHY ENABLE");
+        });
+    }
+}
+
+#[allow(unused)]
+pub(crate) unsafe fn phy_disable() {
+    let count = PHY_ACCESS_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    if count == 1 {
+        critical_section::with(|_| {
+            phy_digital_regs_store();
+            // Disable PHY and RF.
+            phy_close_rf();
+
+            // #if CONFIG_IDF_TARGET_ESP32
+            //         // Update WiFi MAC time before disalbe WiFi/BT common peripheral clock
+            //         phy_update_wifi_mac_time(true, esp_timer_get_time());
+            // #endif
+
+            // Disable WiFi/BT common peripheral clock. Do not disable clock for hardware RNG
+            phy_disable_clock();
+            log::trace!("PHY DISABLE");
+        });
+    }
+}
+
+fn phy_digital_regs_load() {
+    unsafe {
+        if S_IS_PHY_REG_STORED && !G_PHY_DIGITAL_REGS_MEM.is_null() {
+            phy_dig_reg_backup(false, G_PHY_DIGITAL_REGS_MEM);
         }
+    }
+}
 
-        #[cfg(coex)]
-        coex_bt_high_prio();
-    });
+fn phy_digital_regs_store() {
+    unsafe {
+        if !G_PHY_DIGITAL_REGS_MEM.is_null() {
+            phy_dig_reg_backup(true, G_PHY_DIGITAL_REGS_MEM);
+            S_IS_PHY_REG_STORED = true;
+        }
+    }
 }
 
 pub(crate) unsafe fn phy_enable_clock() {
     trace!("phy_enable_clock");
 
-    static mut ENABLE_CNT: u32 = 0;
-
-    if ENABLE_CNT == 0 {
-        let ptr = DPORT_WIFI_CLK_EN_REG as *mut u32;
-        let old = ptr.read_volatile();
-        ptr.write_volatile(old | DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
+    let count = PHY_CLOCK_ENABLE_REF.fetch_add(1, atomic_polyfill::Ordering::SeqCst);
+    if count == 0 {
+        critical_section::with(|_| {
+            let ptr = DPORT_WIFI_CLK_EN_REG as *mut u32;
+            let old = ptr.read_volatile();
+            ptr.write_volatile(old | DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
+        });
+    }
+}
 
-        ENABLE_CNT += 1;
+#[allow(unused)]
+pub(crate) unsafe fn phy_disable_clock() {
+    trace!("phy_disable_clock");
+
+    let count = PHY_CLOCK_ENABLE_REF.fetch_sub(1, atomic_polyfill::Ordering::SeqCst);
+    if count == 1 {
+        critical_section::with(|_| {
+            let ptr = DPORT_WIFI_CLK_EN_REG as *mut u32;
+            let old = ptr.read_volatile();
+            ptr.write_volatile(old & !DPORT_WIFI_CLK_WIFI_BT_COMMON_M);
+        });
     }
 }
 
@@ -134,6 +200,19 @@ unsafe fn getreg32(r: u32) -> u32 {
     (r as *mut u32).read_volatile()
 }
 
+#[allow(unused)]
+pub(crate) fn wifi_reset_mac() {
+    const SYSCON_WIFI_RST_EN_REG: *mut u32 = (0x3ff00000 + 0xD0) as *mut u32;
+    const SYSTEM_MAC_RST: u32 = 1 << 2;
+
+    unsafe {
+        SYSCON_WIFI_RST_EN_REG
+            .write_volatile(SYSCON_WIFI_RST_EN_REG.read_volatile() | SYSTEM_MAC_RST);
+        SYSCON_WIFI_RST_EN_REG
+            .write_volatile(SYSCON_WIFI_RST_EN_REG.read_volatile() & !SYSTEM_MAC_RST);
+    }
+}
+
 /****************************************************************************
  * Name: esp_dport_access_reg_read
  *